Research activity information

• Sep. 2023 画像電子学会, 情報処理学会, 映像情報メディア学会, Visual Computing 2023 企業賞 (サイバーエージェント賞), CycleGANを用いた画像生成による内観シミュレーションに関する研究

  葉木達也, 黒木修隆, 沼 昌宏


• Aug. 2019 第32回 回路とシステムワークショップ, 奨励賞, 極低電圧エネルギーハーベスティングに向けたスイッチトキャパシタ型昇圧コンバータ

  西 雅也, 中澤勇一郎, 松本 香, 黒木修隆, 沼 昌宏, 廣瀬哲也


• May 2018 第31回 回路とシステムワークショップ, 奨励賞, 最大効率点追従制御を用いたスイッチトキャパシタ型降圧コンバータの高効率化

  神崎脩斗, 廣瀬哲也, 尾崎年洋, 浅野大樹, 中澤勇一朗, 黒木修隆, 沼 昌宏


• Sep. 2017 東京大学VDEC, 平成29年度VDECデザイナーズフォーラム, 優秀賞, 超低消費電力32-kHzリアルタイムクロック生成回路

  ASANO Hiroki, HIROSE Tetsuya, TSUBAKI Keishi, MIYOSHI Taro, OZAKI Toshihiro, KUROKI Nobutaka, NUMA Masahiro

  Japan society


• Sep. 2017 IEEE SSCS Japan Chapter, IEEE SSCS Japan Chapter VDEC Design Award, 超低消費電力32-kHzリアルタイムクロック生成回路

  ASANO Hiroki, HIROSE Tetsuya, TSUBAKI Keishi, MIYOSHI Taro, OZAKI Toshihiro, KUROKI Nobutaka, NUMA Masahiro

  Japan society


• May 2017 IEEE SSCS Japan Chapter, IEEE SSCS Japan Chapter Academic Research Award, リアルタイムクロックに向けた電流比較型超低電力フルオンチップRC発振器

  ASANO Hiroki, HIROSE Tetsuya, TSUBAKI Keishi, MIYOSHI Taro, OZAKI Toshihiro, KUROKI Nobutaka, NUMA Masahiro

  Japan society


• Aug. 2016 平成28年度 VDECデザイ ナーズフォーラム, 優秀賞, 1マイクロ秒以内の高速起動を特徴とする高精度32-MHz弛張発振器

  ASANO Hiroki, HIROSE Tetsuya, MIYOSHI Taro, TSUBAKI Keishi, OZAKI Toshihiro, KUROKI Nobutaka, NUMA Masahiro

  Japan society


• Jun. 2016 14th IEEE International NEWCAS Conference, Best Student Paper Award, A fully integrated, 1-us start-up time, 32-MHz relaxation oscillator for low-power intermittent systems

  ASANO Hiroki, HIROSE Tetsuya, MIYOSHI Taro, TSUBAKI Keishi, OZAKI Toshihiro, KUROKI Nobutaka, NUMA Masahiro

  International society


• May 2016 電子情報通信学会集積回路研究専門委員会, IEEE SSCS Japan Chapter Academic Research Award, 間欠動作型VLSIシステムに向けた高速起動可能な32-MHzフルオンチップ弛張発振器

  ASANO Hiroki, HIROSE Tetsuya, MIYOSHI Taro, TSUBAKI Keishi, OZAKI Toshihiro, KUROKI Nobutaka, NUMA Masahiro

  Japan society

• SRFLOW-Attention: Super Resolution with Multi-Head Attention for Effective Use of Low-Resolution Information

  Shinya Ohtani, Nobutaka Kuroki, Masahiro Numa

  This paper proposes normalizing flow‐based image super‐resolution techniques using attention modules. In the proposed method, the features of the low‐resolution images are extracted using a Swin Transformer. Furthermore, multi‐head attention in the flow layers makes effective use of the feature maps. This architecture enables the efficient injection of low‐resolution image features extracted by the transformer into the flow layer. Experimental results at x4 magnifications showed that the proposed method achieved state‐of‐the‐art performance for quantitative metrics and visual quality among single‐loss architectures. © 2024 Institute of Electrical Engineers of Japan and Wiley Periodicals LLC.

  Wiley, Apr. 2024, IEEJ Transactions on Electrical and Electronic Engineering, 19(8) (8), 1360 - 1368

  Scientific journal


• Lightweight monocular depth estimation network using separable convolution

  K. Numata, N. Kuroki, M. Numa

  Mar. 2024, The 25th Workshop on Synthesis And System Integration of Mixed Information Technologies, 187 - 192, English

  [Refereed]


• An error diagnosis technique based on location variable simulation employing dedicated multiplicity-limiter function and ordering for input patterns

  H. Tsuyama, N. Kuroki, M. Numa

  Mar. 2024, The 25th Workshop on Synthesis And System Integration of Mixed Information Technologies, 125 - 130, English

  [Refereed]


• A CNN network suitable for fpga implementation in surveillance camera systems

  S. Ishikawa, N. Kuroki, M. Numa

  Mar. 2024, The 25th Workshop on Synthesis And System Integration of Mixed Information Technologies, 95 - 100, English

  [Refereed]

  International conference proceedings


• Technology Remapping Approach Using Multi-Gate Reconfigurable Cells for Post-Mask Functional ECO

  Tomohiro NISHIGUCHI, Nobutaka KUROKI, Masahiro NUMA

  Institute of Electronics, Information and Communications Engineers (IEICE), Mar. 2024, IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, E107.A(3) (3), 592 - 599

  Scientific journal

  Link to Kobe Univ. Repository (Kernel)


• Switched-capacitor voltage buck converter with variable step-down and switching frequency controllers for low-power and high-efficiency IoT devices

  Ryo Matsuzuka, Shuto Kanzaki, Kaori Matsumoto, Nobutaka Kuroki, Masahiro Numa, Daisuke Kanemoto, Tetsuya Hirose

  Abstract This paper proposes a switched-capacitor voltage buck converter (SC-VBC) with variable step-down controller (VSC) and switching frequency controller (SFC). The VSC and SFC change the step-down ratio and switching frequency of the SC-VBC in accordance with the input voltage and load current, respectively, enabling the converter to operate efficiently with a wide-ranging input voltage and load current. Measurements of a prototype chip demonstrated that our SC-VBC achieved a wide input voltage range and high efficiency of 1.3 – 2.6 V and 69%, respectively.

  IOP Publishing, Feb. 2023, Japanese Journal of Applied Physics

  Scientific journal


• Fully-integrated switched-capacitor voltage boost converter with digital maximum power point tracking for low-voltage energy harvesting

  Kaori Matsumoto, Ryuki Ikeda, Hikaru Sebe, Nobutaka Kuroki, Masahiro Numa, Daisuke Kanemoto, Tetsuya Hirose

  Abstract This paper proposes a fully-integrated switched-capacitor (SC) voltage boost converter (VBC) with a digital maximum power point tracking (MPPT) control circuit for low-voltage and low-power energy harvesting. The proposed digital MPPT control circuit converts analog voltage information of a PV cell into digital values and extracts the maximum power regardless of the harvester conditions and load current. Measurement results demonstrated that our proposed circuit can track the maximum power point of a PV cell successfully. The maximum voltage conversion ratio of our circuit was 5.6. The proposed power management system (PMS) generated a 2.58-V output voltage from a 0.46-V input voltage. The maximum power conversion efficiency was 63.6%.

  IOP Publishing, Jan. 2023, Japanese Journal of Applied Physics

  Scientific journal


• Automated Fish Bone Detection in X‐Ray Images with Convolutional Neural Network and Synthetic Image Generation

  Kazuya Urazoe, Nobutaka Kuroki, Akihiro Maenaka, Hironori Tsutsumi, Mizuki Iwabuchi, Kosuke Fuchuya, Tetsuya Hirose, Masahiro Numa

  Wiley, Nov. 2021, IEEJ Transactions on Electrical and Electronic Engineering, 16(11) (11), 1510 - 1517

  Scientific journal


• Multi-Category Image Super-Resolution with Convolutional Neural Network and Multi-Task Learning

  Kazuya URAZOE, Nobutaka KUROKI, Yu KATO, Shinya OHTANI, Tetsuya HIROSE, Masahiro NUMA

  Institute of Electronics, Information and Communications Engineers (IEICE), Jan. 2021, IEICE Transactions on Information and Systems, E104.D(1) (1), 183 - 193

  Scientific journal


• Combination of Convolutional Neural Network Architecture and its Learning Method for Rotation‐Invariant Handwritten Digit Recognition

  Kazuya Urazoe, Nobutaka Kuroki, Tetsuya Hirose, Masahiro Numa

  Wiley, Jan. 2021, IEEJ Transactions on Electrical and Electronic Engineering, 16(1) (1), 161 - 163

  Scientific journal


• Detecting tampered region in video using LSTM and U‐Net

  Kunihiko Taya, Nobutaka Kuroki, Naoto Takeda, Tetsuya Hirose, Masahiro Numa

  Oct. 2020, Electronics and Communications in Japan, 103(10) (10), 15 - 25, English

  [Refereed]

  Scientific journal


• Improvement of Luminance Isotropy for Convolutional Neural Networks-Based Image Super-Resolution

  URAZOE Kazuya, KUROKI Nobutaka, KATO Yu, OHTANI Shinya, HIROSE Tetsuya, NUMA Masahiro

  Convolutional neural network (CNN)-based image super-resolutions are widely used as a high-quality image-enhancement technique. However, in general, they show little to no luminance isotropy. Thus, we propose two methods, "Luminance Inversion Training (LIT)" and "Luminance Inversion Averaging (LIA)," to improve the luminance isotropy of CNN-based image super-resolutions. Experimental results of 2× image magnification show that the average peak signal-to-noise ratio (PSNR) using Luminance Inversion Averaging is about 0.15-0.20dB higher than that for the conventional super-resolution.

  Institute of Electronics, Information and Communication Engineers(IEICE), Jul. 2020, IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, 103(7) (7), 955 - 958, English

  [Refereed]

  Link to Kobe Univ. Repository (Kernel)


• An 11.8 nA ultra-low power active diode using a hysteresis common gate comparator for low-power energy harvesting systems

  Matsumoto Kaori, Asano Hiroki, Nakazawa Yuichiro, Kuroki Nobutaka, Numa Masahiro, Maida Osamu, Kanemoto Daisuke, Hirose Tetsuya

  Jun. 2020, IEICE Electronics Express, 17(11) (11), 20200103 - 20200103, English

  [Refereed]

  Scientific journal

  Link to Kobe Univ. Repository (Kernel)


• A 34-mV Startup Ring Oscillator Using Stacked Body Bias Inverters for Extremely Low-Voltage Thermoelectric Energy Harvesting

  Masaya Nishi, Kaori Matsumoto, Nobutaka Kuroki, Masahiro Numa, Hikaru Sebe, Ryo Matsuzuka, Osamu Maida, Daisuke Kanemoto, Tetsuya Hirose

  IEEE, Jun. 2020, 2020 18th IEEE International New Circuits and Systems Conference (NEWCAS)

  International conference proceedings


• Detecting tampered regions in JPEG images via CNN

  Kunihiko Taya, Nobutaka Kuroki, Naoto Takeda, Tetsuya Hirose, Masahiro Numa

  IEEE, Jun. 2020, 2020 18th IEEE International New Circuits and Systems Conference (NEWCAS), English

  [Refereed]

  International conference proceedings


• Detecting Tampered Region in video using LSTM and U-Net

  Kunihiko Taya, Nobutaka Kuroki, Naoto Takeda, Tetsuya Hirose, Masahiro Numa

  Institute of Electrical Engineers of Japan (IEE Japan), Apr. 2020, IEEJ Transactions on Electronics, Information and Systems, 140(4) (4), 476 - 483

  Scientific journal


• Rotation invariant-digits recognition with single convolutional neural networks

  K. Urazoe, N. Kuroki, T. Hirose, M. Numa

  Feb. 2020, 2020 RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing (NCSP 2020), English

  [Refereed]

  International conference proceedings


• CNN-based Segmentationand Recognition of Traffic Signs with Parameter Regions

  T.Haraguchi, N. Kuroki, T. Hirose, M. Numa

  Feb. 2020, 2020 RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing (NCSP 2020), English

  [Refereed]

  International conference proceedings


• Super-Resolution with Multi-Path Convolutional Neural Networks

  Urazoe Kazuya, Kuroki Nobutaka, Kato Yu, Ohtani Shinya, Hirose Tetsuya, Numa Masahiro

  This paper proposes an image super-resolution using convolutional neural networks (CNN_S) with multiple paths.

  After SRCNN was proposed by C. Dong et al., CNN-based super resolutions are getting larger and deeper. They do not work quickly without accelerators such as GPU any more. For practical use, however, we need to design CNNs with less internal parameters and low computational costs for convolution operation.

  The proposed CNN architecture consists of multiple paths with different depth. While a shallow path generates low frequency components, a deep path generates high frequency ones. Finally, they are synthesized at the last layer. This architecture can reduce the number of parameters relative to its performance.

  Experimental results have shown that the average processing time for the proposed CNN was only 25% of the conventional MCH while keeping high image qualities.

  The Institute of Electrical Engineers of Japan, 2020, IEEJ Transactions on Electronics, Information and Systems, 140(6) (6), 638 - 650, Japanese

  [Refereed]


• Sub-0.1V Input, Low-Voltage CMOS driver circuit for multi-stage switched capacitor voltage boost converter

  Masaya Nishi, Yuichiro Nakazawa, Kaori Matsumoto, Nobutaka Kuroki, Masahiro Numa, Ryo Matsuzuka, Osamu Maida, Daisuke Kanemoto, Tetsuya Hirose

  Nov. 2019, 2019 26th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2019, 530 - 533

  [Refereed]

  International conference proceedings


• An error diagnosis technique using ZDD to extract error location sets

  H. Nakano, S. Ohmura, N. Kuroki, T. Hirose, M. Numa

  Oct. 2019, The 22nd Workshop on Synthesis And System Integration of Mixed Information Technologies (SASIMI 2019), English

  [Refereed]

  International conference proceedings


• Incremental approaches for locating design errors: averaging epi-groups and generating additional input patterns

  S. Ohmura, H. Nakano, N. Kuroki, T. Hirose, M. Numa

  Oct. 2019, The 22nd Workshop on Synthesis And System Integration of Mixed Information Technologies (SASIMI 2019), English

  [Refereed]

  International conference proceedings


• A global placement method for RECON spare cells in ECO-friendly design style

  J. Akashi, S. Hojo, N. Kuroki, T. Hirose, M. Numa

  Oct. 2019, The 22nd Workshop on Synthesis And System Integration of Mixed Information Technologies (SASIMI 2019), English

  [Refereed]

  International conference proceedings


• A 4ch CNN hardware architecture for image super-resolution

  K. Suzuki, K. Mori, N. Kuroki, T. Hirose, M. Numa

  Oct. 2019, The 22nd Workshop on Synthesis And System Integration of Mixed Information Technologies (SASIMI 2019), English

  [Refereed]

  International conference proceedings


• An ultra-low power active diode using a hysteresis common gate comparator for low-voltage and low-power energy harvesting systems

  Kaori Matsumoto, Tetsuya Hirose, Hiroki Asano, Yuto Tsuji, Yuichiro Nakazawa, Nobutaka Kuroki, Masahiro Numa

  The Institute of Electrical and Electronics Engineers, Feb. 2019, IEEE/IFIP International Conference on VLSI and System-on-Chip, VLSI-SoC, 2018-October, 196 - 200, English

  [Refereed]

  International conference proceedings


• Switched-Capacitor Voltage Buck Converter with Step-Down-Ratio and Clock-Frequency Controllers for Ultra-Low-Power IoT Devices

  Shuto Kanzaki, Tetsuya Hirose, Hiroki Asano, Yuichiro Nakazawa, Nobutaka Kuroki, Masahiro Numa

  The Institute of Electrical and Electronics Engineers, Jan. 2019, 2018 25th IEEE International Conference on Electronics Circuits and Systems, ICECS 2018, 209 - 212, English

  [Refereed]

  International conference proceedings


• 畳み込みニューラルネットワークを用いたJPEG画像における改ざん領域の検出

  TAYA Kunihiko, KUROKI Nobutaka, TAKEDA Naoto, SYUKUIN Yasuaki, KOBAYASHI Tadashi

  電気学会, Nov. 2018, 電気学会論文誌C（電子・情報・システム部門誌）, 138(11) (11), 1417 - 1424, Japanese

  [Refereed]

  Scientific journal


• An Area-Efficient Resistor-less On-Chip Frequency Reference for Ultra-Low Power Real-Time Clock Application

  Hiroki Asano, Tetsuya Hirose, Toshihiro Ozaki, Nobutaka Kuroki, Masahiro Numa

  Institute of Electrical Engineers of Japan, Nov. 2018, IEEJ Transactions on Electrical and Electronic Engineering, 13(11) (11), 1633 - 1641, English

  [Refereed]

  Scientific journal


• A fully integrated, wide-load-range, high-power-conversion-efficiency switched capacitor DC-DC converter with adaptive bias comparator for ultra-low-power power management integrated circuit

  Hiroki Asano, Tetsuya Hirose, Yuta Kojima, Nobutaka Kuroki, Masahiro Numa

  The Japan Society of Applied Physics, Apr. 2018, Japanese Journal of Applied Physics, 57(4) (4), English

  [Refereed]

  International conference proceedings


• Analytical Study of Multi-stage Switched-Capacitor Voltage Boost Converter for Ultra-low Voltage Energy Harvesting

  Yuichiro Nakazawa, Tetsuya Hirose, Toshihiro Ozaki, Yuto Tsuji, Shuto Kanzaki, Hiroki Asano, Nobutaka Kuroki, Masahiro Numa

  The Institute of Electrical and Electronics Engineers, Apr. 2018, Proceedings - IEEE International Symposium on Circuits and Systems, 2018-May, 1 - 5, English

  [Refereed]

  International conference proceedings


• A Sub-1-mu s Start-Up Time, Fully-Integrated 32-MHz Relaxation Oscillator for Low-Power Intermittent Systems

  Hiroki Asano, Tetsuya Hirose, Taro Miyoshi, Keishi Tsubaki, Toshihiro Ozaki, Nobutaka Kuroki, Masahiro Numa

  Mar. 2018, IEICE TRANSACTIONS ON ELECTRONICS, E101C(3) (3), 161 - 169, English

  [Refereed]

  Scientific journal

  Link to Kobe Univ. Repository (Kernel)


• A Sub-1-μs Start-Up Time, Fully-integrated 32-MHz relaxation oscillator for low-power intermittent systems

  Hiroki Asano, Tetsuya Hirose, Taro Miyoshi, Keishi Tsubaki, Toshihiro Ozaki, Nobutaka Kuroki, Masahiro Numa

  The Institute of Electronics, Information and Communication Engineers, Mar. 2018, IEICE Transactions on Electronics, E101C(3) (3), 161 - 169, English

  [Refereed]

  Scientific journal

  Link to Kobe Univ. Repository (Kernel)


• An error diagnosis technique based on unsatisfiable cores to extract error locations sets

  TAKEZAKI Ayano, OHMURA Syogo, KATAYAMA Naoki, HIROSE Tetsuya, KUROKI Nobutaka, NUMA Masahiro

  SASIMI Workshop, Mar. 2018, Proceedings of the 21st workshop on synthesis and system integration of mixed information technologies, 81 - 86, English

  [Refereed]

  Scientific journal


• An ultra-low-power supercapacitor voltage monitoring system for low-voltage energy harvesting

  Takanori Sato, Tetsuya Hirose, Hiroki Asano, Nobutaka Kuroki, Masahiro Numa

  The Institute of Electrical and Electronics Engineers, Feb. 2018, ICECS 2017 - 24th IEEE International Conference on Electronics, Circuits and Systems, 2018-January, 498 - 501, English

  [Refereed]

  International conference proceedings


• A 0.1-0.6 V input range voltage boost converter with low-leakage driver for low-voltage energy harvesting

  Yuto Tsuji, Tetsuya Hirose, Toshihiro Ozaki, Hiroki Asano, Nobutaka Kuroki, Masahiro Numa

  The Institute of Electrical and Electronics Engineers, Feb. 2018, ICECS 2017 - 24th IEEE International Conference on Electronics, Circuits and Systems, 2018-January, 502 - 505, English

  [Refereed]

  International conference proceedings


• Detecting doctored region in JPEG image using convolutional neural networks

  Kunihiko Taya, Nobutaka Kuroki, Naoto Takeda, Yasuaki Shukuin, Tadashi Kobayashi

  Institute of Electrical Engineers of Japan, 2018, IEEJ Transactions on Electronics, Information and Systems, 138(11) (11), 1417 - 1424, Japanese

  Scientific journal


• Analytical Study of Multi-stage Switched-Capacitor Voltage Boost Converter for Ultra-low Voltage Energy Harvesting

  Yuichiro Nakazawa, Tetsuya Hirose, Toshihiro Ozaki, Yuto Tsuji, Shuto Kanzaki, Hiroki Asano, Nobutaka Kuroki, Masahiro Numa

  2018, 2018 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), English

  [Refereed]

  International conference proceedings


• Super-resolution with horizontal and vertical convolutional neural networks

  Yu Kato, Shinya Ohtani, Nobutaka Kuroki, Tetsuya Hirose, Masahiro Numa

  電気学会, 2018, IEEJ Transactions on Electronics, Information and Systems, 138(7) (7), 957 - 963, Japanese

  [Refereed]

  Scientific journal


• An area-efficient, 0.022-mm2, fully integrated resistor-less relaxation oscillator for ultra-low power real-time clock applications

  H. Asano, T. Hirose, T. Ozaki, N. Kuroki, M. Numa

  The Institute of Electrical and Electronics Engineers, Sep. 2017, Proceedings - IEEE International Symposium on Circuits and Systems, 477 - 480, English

  [Refereed]

  International conference proceedings


• A wide load range switched capacitor DC-DC converter with adaptive bias comparator for ultra-low-power power management integrated circuit

  ASANO Hiroki, HIROSE Tetsuya, KOJIMA Yuta, KUROKI Nobutaka, NUMA Masahiro

  The Japan Society of Applied Physics, Sep. 2017, Extended abstract of the 2017 international conference on solid state devices and materials, 511 - 512, English

  [Refereed]

  Scientific journal


• An 80-mV-to-1.8-V Conversion-Range Low-Energy Level Shifter for Extremely Low-Voltage VLSIs

  Ryo Matsuzuka, Tetsuya Hirose, Yuzuru Shizuku, Kyohei Shinonaga, Nobutaka Kuroki, Masahiro Numa

  Aug. 2017, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 64(8) (8), 2026 - 2035, English

  [Refereed]

  Scientific journal

  Link to Kobe Univ. Repository (Kernel)


• Ultralow-quiescent-current and wide-load-range low-dropout linear regulator with self-biasing technique for micropower battery management

  Toshihiro Ozaki, Tetsuya Hirose, Hiroki Asano, Nobutaka Kuroki, Masahiro Numa

  Apr. 2017, JAPANESE JOURNAL OF APPLIED PHYSICS, 56(4) (4), 04CF11, English

  [Refereed]

  Scientific journal


• Segmentation and colorization of grayscale image using convolutional neural network

  ARASHI Yuto, KUROKI Nobutaka, HIROSE Tetsuya, NUMA Masahiro

  Mar. 2017, Proceedings of the 2017 RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing (NCSP 2017), 1PM2 - 3-3, English

  [Refereed]

  International conference proceedings


• Restoring defocus images with Wiener filter and convolutional neural network

  NOHARA Hiroshi, KUROKI Nobutaka, HIROSE Tetsuya, NUMA Masahiro

  Mar. 2017, Proceedings of the 2017 RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing (NCSP 2017), 1AM2 - 1-4, English

  [Refereed]

  International conference proceedings


• A study on point cloud registration with SIFT features

  YAMAGUCHI Yudai, KUROKI Nobutaka, HIROSE Tetsuya, NUMA Masahiro

  Mar. 2017, Proceedings of the 2017 RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing (NCSP 2017), 3AM2 - 3-5, English

  [Refereed]

  International conference proceedings


• Multi-channel convolutional neural networks for image super-resolution

  Shinya Ohtani, Yu Kato, Nobutaka Kuroki, Tetsuya Hirose, Masahiro Numa

  Feb. 2017, IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, E100A(2) (2), 572 - 580, English

  [Refereed]

  Scientific journal

  Link to Kobe Univ. Repository (Kernel)


• Multi-Channel Convolutional Neural Networks for Image Super-Resolution

  Shinya Ohtani, Yu Kato, Nobutaka Kuroki, Tetsuya Hirose, Masahiro Numa

  Feb. 2017, IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES, E100A(2) (2), 572 - 580, English

  [Refereed]

  Scientific journal

  Link to Kobe Univ. Repository (Kernel)


• Detecting doctored JPEG image based on block noise analysis and double JPEG analysis

  Kunihiko Taya, Naoto Takeda, Tadashi Kobayashi, Yoshiaki Ozaki, Nobutaka Kuroki

  Institute of Electrical Engineers of Japan, 2017, IEEJ Transactions on Electronics, Information and Systems, 137(5) (5), 742 - 749, Japanese

  [Refereed]

  Scientific journal


• Sub-1-mu s Start-up Time, 32-MHz Relaxation Oscillator for Low-Power Intermittent VLSI Systems

  H. Asano, T. Hirose, T. Miyoshi, K. Tsubaki, T. Ozaki, N. Kuroki, M. Numa

  2017, 2017 22ND ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE (ASP-DAC), 35 - 36, English

  [Refereed]

  International conference proceedings


• Impedance Matching in Magnetic-Coupling-Resonance Wireless Power Transfer for Small Implantable Devices

  Sota Masuda, Tetsuya Hirose, Yuki Akihara, Nobutaka Kuroki, Masahiro Numa, Masanori Hashimoto

  2017, 2017 IEEE WIRELESS POWER TRANSFER CONFERENCE (WPTC 2017), 1 - 4, English

  [Refereed]

  International conference proceedings


• A highly efficient switched-capacitor voltage boost converter with nano-watt MPPT controller for low-voltage energy harvesting

  Toshihiro Ozaki, Tetsuya Hirose, Takahiro Nagai, Keishi Tsubaki, Nobutaka Kuroki, Masahiro Numa

  Dec. 2016, IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, E99A(12) (12), 2491 - 2499, English

  [Refereed]

  International conference proceedings


• A Highly Efficient Switched-Capacitor Voltage Boost Converter with Nano-Watt MPPT Controller for Low-Voltage Energy Harvesting

  Toshihiro Ozaki, Tetsuya Hirose, Takahiro Nagai, Keishi Tsubaki, Nobutaka Kuroki, Masahiro Numa

  Dec. 2016, IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES, E99A(12) (12), 2491 - 2499, English

  [Refereed]

  Scientific journal


• On component ratio of RECON spare cells for ECO-friendly design style

  SAWAI Takeshi, TAKEZAKI Ayano, HIROSE Tetsuya, KUROKI Nobutaka, NUMA Masahiro

  Oct. 2016, Proceedings of the 20th Workshop on Synthesis And System Integration of Mixed Information Technologies (SASIMI 2016), 205 - 210, English

  [Refereed]

  International conference proceedings


• Fully-Integrated High-Conversion-Ratio Dual-Output Voltage Boost Converter With MPPT for Low-Voltage Energy Harvesting

  Toshihiro Ozaki, Tetsuya Hirose, Hiroki Asano, Nobutaka Kuroki, Masahiro Numa

  Oct. 2016, IEEE JOURNAL OF SOLID-STATE CIRCUITS, 51(10) (10), 2398 - 2407, English

  [Refereed]

  Scientific journal


• An error diagnosis technique based on averaged EPI values to extract error locations sets

  TAKEZAKI Ayano, SAWAI Takeshi, HIROSE Tetsuya, KUROKI Nobutaka, NUMA Masahiro

  Oct. 2016, Proceedings of the 20th Workshop on Synthesis And System Integration of Mixed Information Technologies (SASIMI 2016), 317 - 322, English

  [Refereed]

  International conference proceedings


• A hardware architecture to perform K-means clustering for learning-based super-resolution combining self-learning and prior-learning dictionaries

  MURATA Daichi, KIRIYAMA Ayumi, HIROSE Tetsuya, KUROKI Nobutaka, NUMA Masahiro

  Oct. 2016, Proceedings of the 20th Workshop on Synthesis And System Integration of Mixed Information Technologies (SASIMI 2016), 268 - 273, English

  [Refereed]

  International conference proceedings


• A self-biased low-dropout linear regulator for ultra-low power battery management

  OZAKI Toshihiro, HIROSE Tetsuya, ASANO Hiroki, KUROKI Nobutaka, NUMA Masahiro

  Sep. 2016, Extended abstract of the 2016 International Conference on Solid State Devices and Materials (SSDM 2016), 463 - 464, English

  [Refereed]

  Research society


• 4出力の畳み込みニューラルネットワークを用いた超解像

  KATO Yu, OHTANI Shinya, KUROKI Nobutaka, HIROSE Tetsuya, NUMA Masahiro

  Sep. 2016, 第15回情報科学技術フォーラム（FIT2016）講演論文集, RI - 005, Japanese

  [Refereed]

  Symposium


• 極低入力電圧を昇圧するチャージポンプ回路の設計

  TSUJI Yuto, HIROSE Tetsuya, OZAKI Toshihiro, ASANO Hiroki, OGUNI Kazumichi, KUROKI Nobutaka, NUMA Masahiro

  [電子情報通信学会], May 2016, 第29回 回路とシステムワークショップ論文集, 29, 301 - 306, Japanese

  [Refereed]

  Symposium


• 4並列の畳み込みニューラルネットワークを用いた超解像

  OHTANI Shinya, KATO Yu, KUROKI Nobutaka, HIROSE Tetsuya, NUMA Masahiro

  May 2016, 電子情報通信学会論文誌, J99-D(5) (5), 588 - 593, Japanese

  [Refereed]

  Scientific journal


• Locally weighted averaging for denoising of medical tomographic images

  KATO Yu, KUROKI Nobutaka, HIROSE Tetsuya, NUMA Masahiro

  This paper proposes an effective noise reduction approach for retinal tomography. Tomographic images include many speckle and impulse noises. The conventional approach removes them by averaging ten or more continuous shots in a second. However, the averaging often causes a blur or disappearance of the diseased part because patient's eyeball moves in three dimensions during the continuous shooting. This paper proposes a new approach based on locally weighted averaging to reduce noise while being diagnosed. Results of the comparative experiments have shown that the proposed approach can hold the feature of the diagnosis part, while the conventional approach loses it.

  Research Institute of Signal Processing, Japan, Apr. 2016, Journal of Signal Processing, 20(4) (4), 217 - 220, English

  [Refereed]

  Scientific journal


• Three dimensional NL-Means method for denoising continuous shooting photography

  KOBORI Hirokazu, KUROKI Nobutaka, HIROSE Tetsuya, NUMA Masahiro

  Research institute of signal processing japan, Mar. 2016, RISP international workshop on nonlinear circuits, 570 - 573, English

  [Refereed]

  International conference proceedings


• Noise reduction for medical tomographic images based on locally weighted averaging

  KATO Yu, KUROKI Nobutaka, HIROSE Tetsuya, NUMA Masahiro

  Research institute of signal processing japan, Mar. 2016, RISP international workshop on nonlinear circuits, 566 - 569, English

  [Refereed]

  International conference proceedings


• Crack extraction from noisy images with fractal dimension analysis

  HANAKI Ryo, KUROKI Nobutaka, HIROSE Tetsuya, NUMA Masahiro

  Research institute of signal processing japan, Mar. 2016, RISP international workshop on nonlinear circuits, 423 - 426, English

  [Refereed]

  International conference proceedings


• Anomalous behavior detection in videos based on deformable part models

  SUGIMOTO Tamotsu, KUROKI Nobutaka, HIROSE Tetsuya, NUMA Masahiro

  Research institute of signal processing japan, Mar. 2016, RISP international workshop on nonlinear circuits, 419 - 422, English

  [Refereed]

  International conference proceedings


• A fully on-chip 3-terminal switched-capacitor DC-DC converter for low-voltage CMOS LSIs

  KOJIMA Yuta, HIROSE Tetsuya, TSUBAKI Keishi, OZAKI Toshihiro, ASANO Hiroki, KUROKI Nobutaka, NUMA Masahiro

  In this paper, we present a fully on-chip switched-capacitor DC–DC converter for low-voltage CMOS LSIs. The converter has three terminals of input, ground, and output, by developing control circuits with fully on-chip configuration. We employ an ultra low-power nanoampere bias current and voltage reference circuit to achieve ultra low-power dissipation of control circuits. It enables us to realize a highly efficient power conversion circuit at light-load-current applications. The converter achieves highly efficient and robust voltage conversion using a pulse frequency modulation control circuit and a start-up/fail-safe circuit. Measurement results demonstrated that the converter can convert a 3.0 V input into 1.2 V output successfully. The start-up and fail-safe operations were confirmed through the measurement. The efficiency was more than 50% in the range of 2–6 µA load current.

  The japan society of applied physics, Mar. 2016, Japanese journal of applied phisycs, 55(4s) (4s), 04EF09 - 1-04EF09-5, English

  [Refereed]

  Scientific journal


• Image Super-Resolution with Multi-Channel Convolutional Neural Networks

  Yu Kato, Shinya Ohtani, Nobutaka Kuroki, Tetsuya Hirose, Masahiro Numa

  2016, 2016 14TH IEEE INTERNATIONAL NEW CIRCUITS AND SYSTEMS CONFERENCE (NEWCAS), 1 - 4, English

  [Refereed]

  International conference proceedings


• A Fully Integrated, 1-mu s Start-up Time, 32-MHz Relaxation Oscillator for Low-Power Intermittent Systems

  H. Asano, T. Hirose, T. Miyoshi, K. Tsubaki, T. Ozaki, N. Kuroki, M. Numa

  2016, 2016 14TH IEEE INTERNATIONAL NEW CIRCUITS AND SYSTEMS CONFERENCE (NEWCAS), 1 - 4, English

  [Refereed]

  International conference proceedings


• A 1.66-nW/kHz, 32.7-kHz, 99.5ppm/degrees C Fully Integrated Current-Mode RC Oscillator for Real-Time Clock Applications with PVT Stability

  H. Asano, T. Hirose, K. Tsubaki, T. Miyoshi, T. Ozaki, N. Kuroki, M. Numa

  2016, ESSCIRC CONFERENCE 2016, 149 - 152, English

  [Refereed]

  International conference proceedings


• Highly-Efficient Power Transmitter Coil Design for Small Wireless Sensor Nodes

  Souta Masuda, Tetsuya Hirose, Yuki Akihara, Nobutaka Kuroki, Masahiro Numa, Masanori Hashimoto

  2016, 2016 INTERNATIONAL SYMPOSIUM ON ANTENNAS AND PROPAGATION (ISAP), 512 - 513, English

  [Refereed]

  International conference proceedings


• Analytical Study of Rectifier Circuit for Wireless Power Transfer Systems

  Yuki Akihara, Tetsuya Hirose, Sota Masuda, Nobutaka Kuroki, Masahiro Numa, Masanori Hashimoto

  2016, 2016 INTERNATIONAL SYMPOSIUM ON ANTENNAS AND PROPAGATION (ISAP), 338 - 339, English

  [Refereed]

  International conference proceedings


• A 0.38-mu W Stand-by Power, 50-nA-to-1-mA Load Current Range DC-DC Converter with Self-Biased Linear Regulator for Ultra-Low Power Battery Management

  Toshihiro Ozaki, Tetsuya Hirose, Hiroki Asano, Nobutaka Kuroki, Masahiro Numa

  2016, 2016 IEEE ASIAN SOLID-STATE CIRCUITS CONFERENCE (A-SSCC), 225 - 228, English

  [Refereed]

  International conference proceedings


• A Fully Integrated, 1-mu s Start-up Time, 32-MHz Relaxation Oscillator for Low-Power Intermittent Systems

  H. Asano, T. Hirose, T. Miyoshi, K. Tsubaki, T. Ozaki, N. Kuroki, M. Numa

  2016, 2016 14TH IEEE INTERNATIONAL NEW CIRCUITS AND SYSTEMS CONFERENCE (NEWCAS), 101-C(3) (3), 161 - 169, English

  [Refereed]

  International conference proceedings

  Link to Kobe Univ. Repository (Kernel)


• An Energy-Efficient 24T Flip-Flop Consisting of Standard CMOS Gates for Ultra-Low Power Digital VLSIs

  Yuzuru Shizuku, Tetsuya Hirose, Nobutaka Kuroki, Masahiro Numa, Mitsuji Okada

  Dec. 2015, IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES, E98A(12) (12), 2600 - 2606, English

  [Refereed]

  Scientific journal


• An energy-efficient 24T flip-flop consisting of standard CMOS gates for ultra-low power digital VLSIs

  Yuzuru Shizuku, Tetsuya Hirose, Nobutaka Kuroki, Masahiro Numa, Mitsuji Okada

  The institute of electronics, information and communication engineers (IEEE), Dec. 2015, IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, E98A(12) (12), 2600 - 2606, English

  [Refereed]

  Scientific journal


• A wireless power transfer system for small-sized sensor applications

  AKIHARA Yuki, HIROSE Tetsuya, TANAKA Yuki, KUROKI Nobutaka, NUMA Masahiro, HASHIMOTO Masanori

  The japan society of applied physics, Sep. 2015, Extended abstract of the 2015 international conference on solid state devices and materials, 154 - 155, English

  [Refereed]

  International conference proceedings


• A fully on-chip 3-terminal switched-capacitor DC-DC converter with startup/fail-safe circuit

  KOJIMA Yuta, HIROSE Tetsuya, TSUBAKI Keishi, OZAKI Toshihiro, ASANO Hiroki, KUROKI Nobutaka, NUMA Masahiro

  The japan society of applied physics, Sep. 2015, Extended abstract of the 2015 international conference on solid state devices and materials, 158 - 159, English

  [Refereed]

  International conference proceedings


• 適応バイアス技術を用いた超低電力・高速オペアンプの高性能化

  TSUBOI Jyunki, HIROSE Tetsuya, OZAKI Toshihiro, ASANO Hiroki, KUROKI Nobutaka, NUMA Masahiro

  電子情報通信学会, Aug. 2015, 第28回 回路とシステムワークショップ, 28, 94 - 99, Japanese

  [Refereed]

  Symposium


• 小型センサデバイスに向けた無線給電システムの設計

  AKIHARA Yuki, HIROSE Tetsuya, TANAKA Yuki, KUROKI Nobutaka, NUMA Masahiro, HASHIMOTO Masanori

  電子情報通信学会, Aug. 2015, 第28回 回路とシステムワークショップ, 258 - 263, Japanese

  [Refereed]

  Symposium


• 高耐圧CMOSプロセスによる超低電力・適応バイアス型シリーズレギュレータ

  SADO Kenji, HIROSE Tetsuya, TSUBAKI Keishi, OZAKI Toshihiro, ASANO Hiroki, MATSUMOTO Kaori, KUROKI Nobutaka, NUMA Masahiro

  電子情報通信学会, Aug. 2015, 第28回 回路とシステムワークショップ, 28, 264 - 269, Japanese

  [Refereed]

  Symposium


• 高速起動を特徴とするフルオンチップ32 MHz弛張発振回路

  MIYOSHI Taro, HIROSE Tetsuya, TSUBAKI Keishi, ASANO Hiroki, OZAKI Toshihiro, KUROKI Nobutaka, NUMA Masahiro

  電子情報通信学会, Aug. 2015, 第28回 回路とシステムワークショップ, 28, 70 - 75, Japanese

  [Refereed]

  Symposium


• スイッチトキャパシタ回路を用いたオンチップ電源回路の高効率化

  KOJIMA Yuta, HIROSE Tetsuya, TSUBAKI Keishi, OZAKI Toshihiro, ASANO Hiroki, KUROKI Nobutaka, NUMA Masahiro

  電子情報通信学会, Aug. 2015, 第28回 回路とシステムワークショップ, 28, 270 - 275, Japanese

  [Refereed]

  Symposium


• サブスレッショルド領域動作に適したスタンダードセルのサイジング手法

  SHINONAGA Kyohei, HIROSE Tetsuya, SHIZUKU Yuzuru, MATSUZUKA Ryo, KUROKI Nobutaka, NUMA Masahiro

  電子情報通信学会, Aug. 2015, 第28回 回路とシステムワークショップ, 28, 88 - 93, Japanese

  [Refereed]

  Symposium


• A 0.19-V minimum input low energy level shifter for extremely low-voltage VLSIs

  Ryo Matsuzuka, Tetsuya Hirose, Yuzuru Shizuku, Nobutaka Kuroki, Masahiro Numa

  Jul. 2015, Proceedings - IEEE International Symposium on Circuits and Systems, 2015-July, 2948 - 2951

  [Refereed]

  International conference proceedings


• A 32-kHz Real-Time Clock Oscillator with On-Chip PVT Variation Compensation Circuit for Ultra-Low Power MCUs

  Keishi Tsubaki, Tetsuya Hirose, Nobutaka Kuroki, Masahiro Numa

  May 2015, IEICE TRANSACTIONS ON ELECTRONICS, E98C(5) (5), 446 - 453, English

  [Refereed]

  Scientific journal


• A 32-kHz real-time clock oscillator with on-chip PVT variation compensation circuit for ultra-low power MCUs

  Keishi Tsubaki, Tetsuya Hirose, Nobutaka Kuroki, Masahiro Numa

  The institute of electronics, information and communication engineers (IEEE), May 2015, IEICE Transactions on Electronics, E98C(5) (5), 446 - 453, English

  [Refereed]

  Scientific journal


• Nano watt power rail-to-rail CMOS amplifier with adaptive biasing circuits for ultralow-power analog LSIs

  Toshihiro Ozaki, Tetsuya Hirose, Keishi Tsubaki, Nobutaka Kuroki, Masahiro Numa

  The Japan Society of Applied Physics (JSAP), Apr. 2015, Japanese Journal of Applied Physics, 54(4) (4), 1 - 7, English

  [Refereed]

  International conference proceedings


• A 0.21-V minimum input, 73.6% maximum efficiency, fully integrated 3-terminal voltage converter with MPPT for low-voltage energy harvesters

  Toshihiro Ozaki, Tetsuya Hirose, Takahiro Nagai, Keishi Tsubaki, Nobutaka Kuroki, Masahiro Numa

  The Institute of Electrical and Electronics Engineers (IEEE), Mar. 2015, 20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015, 30 - 31, English

  [Refereed]

  International conference proceedings


• Object Detection with Deformable Part Models and Deep Convolutional Neural Networks

  OHTANI Shinya, KUROKI Nobutaka, HIROSE Tetsuya, NUMA Masahiro

  Research Institute of Signal Processing Japan (RISP), Mar. 2015, Proceedings of 2015 RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing (NCSP 2015), 218 - 221, English

  [Refereed]

  International conference proceedings


• Bayer Demosaicing with Example-Based Super-Resolution

  MIYAHARA Kyousuke, KUROKI Nobutaka, HIROSE Tetsuya, NUMA Masahiro

  Research Institute of Signal Processing Japan (RISP), Mar. 2015, Proceedings of 2015 RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing (NCSP 2015), 421 - 424, English

  [Refereed]

  International conference proceedings


• Architecture of a JPEG Noise Reduction Method with Total Variation

  ONISHI Toshihito, KUROKI Nobutaka, HIROSE Tetsuya, NUMA Masahiro

  Research Institute of Signal Processing Japan (RISP), Mar. 2015, Proceedings of 2015 RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing (NCSP 2015), 353 - 356, English

  [Refereed]

  International conference proceedings


• An ECO-friendly design style based on reconfigurable cells

  KABATA Yudai, HIROSE Tetsuya, KUROKI Nobutaka, NUMA Masahiro

  Mar. 2015, Proceedings of the 19th Workshop on Synthesis And System Integration of Mixed Information Technologies (SASIMI 2015), 319 - 324, English

  [Refereed]

  International conference proceedings


• Energy-efficient AES subbytes transformation circuit using asynchronous circuits for ultra-low voltage operation

  Yuzuru Shizuku, Tetsuya Hirose, Nobutaka Kuroki, Masahiro Numa, Mitsuji Okada

  The Institute of Electronics, Information and Communication Engineers (IEICE), Jan. 2015, IEICE Electronics Express, 12(4) (4), 1 - 10, English

  [Refereed]

  Scientific journal


• A 0.19-V Minimum Input Low Energy Level Shifter for Extremely Low-Voltage VLSIs

  Ryo Matsuzuka, Tetsuya Hirose, Yuzuru Shizuku, Nobutaka Kuroki, Masahiro Numa

  2015, 2015 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), 2948 - 2951, English

  [Refereed]

  International conference proceedings


• A Fully-Integrated, High-Conversion-Ratio and Dual-Output Voltage Boost Converter with MPPT for Low-Voltage Energy Harvesting

  Toshihiro Ozaki, Tetsuya Hirose, Hiroki Asano, Nobutaka Kuroki, Masahiro Numa

  2015, 2015 IEEE ASIAN SOLID-STATE CIRCUITS CONFERENCE (A-SSCC), 297 - 300, English

  [Refereed]

  International conference proceedings


• 学習型超解像による4倍拡大映像出力ハードウェアの実現と辞書探索回路の規模削減

  MATSUZUKA Ryo, KIRIYAMA Ayumi, MICHIBATA Kohei, SHIZUKU Yuzuru, HIROSE Tetsuya, KUROKI Nobutaka, NUMA Masahiro

  情報処理学会, Sep. 2014, 情報処理学会 第13回情報科学技術フォーラム（FIT2014）, 173 - 174, Japanese

  Symposium


• A Nano-Watt Power Rail-to-Rail CMOS Amplifier with Adaptive Biasing for Ultra-Low Power Analog LSIs

  OZAKI Toshihiro, HIROSE Tetsuya, KUROKI Nobutaka, NUMA Masahiro

  The Japan Society of Applied Physics (JSAP), Sep. 2014, Extended abstract of the 2014 International Conference on Solid State Devices and Materials (SSDM 2014), 964 - 965, English

  [Refereed]

  Research society


• 電力変換効率の負荷電流依存性を考慮したオンチップチャージポンプの高効率化

  ASANO Hiroki, HIROSE Tetsuya, TSUBAKI Keishi, OZAKI Toshihiro, KUROKI Nobutaka, NUMA Masahiro

  電子情報通信学会, Aug. 2014, 第27 回 回路とシステムワークショップ, 27, 25 - 30, Japanese

  [Refereed]

  Symposium


• 時間計測アプリケーシ ョンに向けた超低電力弛張発振回路

  TSUBAKI Keishi, HIROSE Tetsuya, OZAKI Toshihiro, KUROKI Nobutaka, NUMA Masahiro

  電子情報通信学会, Aug. 2014, 電子情報通信学会 集積回路研究会, 99 - 104, Japanese

  Symposium


• 高耐圧CMOSトランジスタによる低電力バンドギャップリファレンス回路

  MATSUMOTO Kaori, HIROSE Tetsuya, TSUBAKI Keishi, KUROKI Nobutaka, NUMA Masahiro

  電子情報通信学会, Aug. 2014, 第27 回 回路とシステムワークショップ, 31 - 35, Japanese

  [Refereed]

  Symposium


• PWM制御方式を用いた時間分解能型ADコンバータの低電力化

  OGUNI Kazumichi, HIROSE Tetsuya, TSUBAKI Keishi, OZAKI Toshihiro, KUROKI Nobutaka, NUMA Masahiro

  電子情報通信学会, Aug. 2014, 第27 回 回路とシステムワークショップ, 27, 300 - 305, Japanese

  [Refereed]

  Symposium


• A fully on-chip, 6.66-kHz, 320-nA, 56 ppm/ °c, CMOS relaxation oscillator with PVT variation compensation circuit

  Keishi Tsubaki, Tetsuya Hirose, Yuji Osaki, Seiichiro Shiga, Nobutaka Kuroki, Masahiro Numa

  The Institute of Electronics, Information and Communication Engineers (IEICE), Jun. 2014, IEICE Transactions on Electronics, E97-C(6) (6), 512 - 518, English

  [Refereed]

  Scientific journal


• A Fully On-Chip, 6.66-kHz, 320-nA, 56 ppm/degrees C, CMOS Relaxation Oscillator with PVT Variation Compensation Circuit

  Keishi Tsubaki, Tetsuya Hirose, Yuji Osaki, Seiichiro Shiga, Nobutaka Kuroki, Masahiro Numa

  Jun. 2014, IEICE TRANSACTIONS ON ELECTRONICS, E97C(6) (6), 512 - 518, English

  [Refereed]

  Scientific journal


• Scene Segmentation for TV Programs Based on a Bag-of-VisualWords Model

  IJIRI Shota, KUROKI Nobutaka, HIROSE Tetsuya, NUMA Masahiro

  RISP, Mar. 2014, 2014 RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing (NCSP 2014), 41 - 44, English

  [Refereed]

  International conference proceedings


• Estimation of Visual Importance Map for Image Quality Assessment

  IZUMI Naoyuki, KUROKI Nobutaka, HIROSE Tetsuya, NUMA Masahiro

  RISP, Mar. 2014, 2014 RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing (NCSP 2014), 501 - 504, English

  [Refereed]

  International conference proceedings


• A Scene Matching Method for TV Programs Based on Audio Features

  OURA Junki, KUROKI Nobutaka, HIROSE Tetsuya, NUMA Masahiro

  RISP, Mar. 2014, 2014 RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing (NCSP 2014), 361 - 364, English

  [Refereed]

  International conference proceedings


• Architecture of Digital Zooming Function with Example-Based Hierarchical Super-Resolution

  SUGAHARA Yuki, KUROKI Nobutaka, HIROSE Tetsuya, NUMA Masahiro

  RISP, Mar. 2014, 2014 RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing (NCSP 2014), 301 - 304, English

  [Refereed]

  International conference proceedings


• A 24-Transistor Static Flip-Flop Consisting of NORs and Inverters for Low-Power Digital VLSIs

  Yuzuru Shizuku, Tetsuya Hirose, Nobutaka Kuroki, Masahiro Numa, Mitsuji Okada

  2014, 2014 IEEE 12TH INTERNATIONAL NEW CIRCUITS AND SYSTEMS CONFERENCE (NEWCAS), 137 - 140, English

  [Refereed]

  International conference proceedings


• A 0.21-V Minimum Input, 73.6% Maximum Efficiency, Fully Integrated Voltage Boost Converter with MPPT for Low-Voltage Energy Harvesters

  Toshihiro Ozaki, Tetsuya Hirose, Takahiro Nagai, Keishi Tsubaki, Nobutaka Kuroki, Masahiro Numa

  2014, PROCEEDINGS OF THE 40TH EUROPEAN SOLID-STATE CIRCUIT CONFERENCE (ESSCIRC 2014), 255 - 258, English

  [Refereed]

  International conference proceedings


• Technology remapping based on multiple solutions for post-mask functional ECO

  KABATA Yudai, HIROSE Tetsuya, KUROKI Nobutaka, NUMA Masahiro

  Oct. 2013, 18th Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI 2013), 253 - 258, English

  [Refereed]

  International conference proceedings


• A technique for accelerating adaptive super resolution technique based on local features of images using GPU

  KUGAI Kento, SHIZUKU Yuzuru, HIROSE Tetsuya, KUROKI Nobutaka, NUMA Masahiro

  Oct. 2013, 18th Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI 2013), 170 - 175, English

  [Refereed]

  International conference proceedings


• An error diagnosis technique using QBF solver to fix LUT functions

  KATAYAMA Naoki, SAKAMOTO Hiroyuki, HIROSE Tetsuya, KUROKI Nobutaka, NUMA Masahiro

  Oct. 2013, 18th Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI 2013), 28 - 33, English

  [Refereed]

  International conference proceedings


• A memory-saving technique for 4K super-resolution circuit with binary tree dictionary

  KIRIYAMA Ayumi, MATSUZUKA Ryo, MICHIBATA Kouhei, KITAYAMA Takahiro, SHIZUKU Yuzuru, HIROSE Tetsuya, KUROKI Nobutaka, NUMA Masahiro

  Oct. 2013, 18th Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI 2013), 360 - 365, English

  [Refereed]

  International conference proceedings


• A compact and energy-efficient Muller C-element for low-voltage asynchronous CMOS digital circuits

  SHIZUKU Yuzuru, HIROSE Tetsuya, DANNO Yuya, KUROKI Nobutaka, NUMA Masahiro

  Oct. 2013, 18th Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI 2013), 118 - 122, English

  [Refereed]

  International conference proceedings


• Highlight Generation Technique for Baseball Games Based on Information Entropies

  SADAMOTO Taishi, KATAOKA Mitsuteru, KUROKI Nobutaka, HIROSE Tetsuya, NUMA Masahiro

  RISP, Mar. 2013, Proceedings of 2013 RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing (NCSP 2013), 373 - 376, English

  [Refereed]

  International conference proceedings


• 学習型超解像のための二分木辞書

  HASHIMOTO Akinobu, NAKAYA Tomohiro, KUROKI Nobutaka, HIROSE Tetsuya, NUMA Masahiro

  学習型超解像の辞書を二分木構造化する手法を提案する.本論文では,辞書内の事例探索アルゴリズムに二分木探索を用いることで,高速処理と高画質化を実現した.実験の結果,従来の探索時間のオーダをO(N)からO(2log_2N)に高速化し,PSNRを約0.6dB改善できることを確認した.

  電子情報通信学会, Feb. 2013, 電子情報通信学会論文誌, J96-D(2) (2), 357 - 361, Japanese

  [Refereed]

  Scientific journal


• 1.2-V supply, 100-nW, 1.09-V bandgap and 0.7-V supply, 52.5-nW, 0.55-V subbandgap reference circuits for nanowatt CMOS LSIs

  Yuji Osaki, Tetsuya Hirose, Nobutaka Kuroki, Masahiro Numa

  IEEE, 2013, IEEE Journal of Solid-State Circuits, 48(6) (6), 1530 - 1538, English

  [Refereed]

  Scientific journal


• A 32.55-kHz, 472-nW, 120ppm/°C, fully on-chip, variation tolerant CMOS relaxation oscillator for a real-time clock application

  Keishi Tsubaki, Tetsuya Hirose, Nobutaka Kuroki, Masahiro Numa

  2013, European Solid-State Circuits Conference, 315 - 318, English

  [Refereed]

  International conference proceedings


• A dynamic comparator using dynamic currents of CMOS logic gates for low-power and high-efficient offset calibration

  MASUDA Chotaro, HIROSE Tetsuya, OSAKI Yuji, KUROKI Nobutaka, NUMA Masahiro

  JSAP, Sep. 2012, Extended abstract of the 2012 International Conference on Solid State Devices and Materials, 154 - 155, English

  [Refereed]

  International conference proceedings


• A Low-Power Level Shifter With Logic Error Correction for Extremely Low-Voltage Digital CMOS LSIs

  Yuji Osaki, Tetsuya Hirose, Nobutaka Kuroki, Masahiro Numa

  Jul. 2012, IEEE JOURNAL OF SOLID-STATE CIRCUITS, 47(7) (7), 1776 - 1783, English

  [Refereed]

  Scientific journal


• Saving power consumption in final stage adder of multiplier by using difference in arrival times with input signals

  SHIZUKU Yuzuru, KOGURE Takeshi, FUJIOKA Tatsuya, HIROSE Tetsuya, KUROKI Nobutaka, NUMA Masahiro

  Mar. 2012, The 17th Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI 2012), pp. 192-196, English

  [Refereed]

  International conference proceedings


• Reduction of glitches for low-power multipliers using 4-2 compressors based on hybrid-CMOS logic style

  SON Yang-uk, SHIZUKU Yuzuru, KOGURE Takeshi, HIROSE Tetsuya, KUROKI Nobutaka, NUMA Masahiro

  Mar. 2012, The 17th Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI 2012), pp. 534-538, English

  [Refereed]

  International conference proceedings


• Reconfigurable cells for post-mask ECO

  SENZAKI Hiroto, MATSUYAMA Tomoki, WATANABE Kosuke, HIROSE Tetsuya, KUROKI Nobutaka, NUMA Masahiro

  Mar. 2012, The 17th Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI 2012), pp. 199-204, English

  [Refereed]

  International conference proceedings


• Hardware architecture for real-time operation of learning-based super-resolution using binary search tree

  KITAYAMA Takahiro, MICHIBATA Kohei, SHIZUKU Yuzuru, HIROSE Tetsuya, KUROKI Nobutaka, NUMA Masahiro

  Mar. 2012, The 17th Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI 2012), pp. 492-496, English

  [Refereed]

  International conference proceedings


• A technique for accelerating SVM-based image recognition using GPU

  SASAKI Jin, SHIZUKU Yuzuru, HIROSE Tetsuya, KUROKI Nobutaka, NUMA Masahiro

  Mar. 2012, The 17th Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI 2012), pp. 28-32, English

  [Refereed]

  International conference proceedings


• An error diagnosis technique based on SAT solver

  MATSUYAMA Tomoki, SENZAKI Hiroto, WATANABE Kosuke, HIROSE Tetsuya, KUROKI Nobutaka, NUMA Masahiro

  Mar. 2012, The 17th Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI 2012), pp. 544-548, English

  [Refereed]

  International conference proceedings


• A delay control technique for low-voltage subthreshold CMOS digital circuits

  SHIGA Seiichiro, HIROSE Tetsuya, OSAKI Yuji, KUROKI Nobutaka, NUMA Masahiro

  Mar. 2012, The 17th Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI 2012), pp. 555-559, English

  [Refereed]

  International conference proceedings


• カラー画像に対応した画質評価手法VSNRC

  KAWASHIMA Kazumi, NAKAYA Tomohiro, HIROSE Tetsuya, KUROKI Nobutaka, NUMA Masahiro

  Feb. 2012, 神戸大学大学院工学研究科紀要, 第3号, pp. 32-39, Japanese

  [Refereed]

  Scientific journal

  Link to Kobe Univ. Repository (Kernel)


• A nano-watt power CMOS amplifier with adaptive biasing for power-aware analog LSIs

  Yumiko Tsuruya, Tetsuya Hirose, Yuji Osaki, Nobutaka Kuroki, Masahiro Numa, Osamu Kobayashi

  IEEE, 2012, European Solid-State Circuits Conference, 69 - 72, English

  [Refereed]

  International conference proceedings


• A Low-Power Single-Slope Analog-to-Digital Converter with Digital PVT Calibration

  Yuji Osaki, Tetsuya Hirose, Keishi Tsubaki, Nobutaka Kuroki, Masahiro Numa

  2012, 2012 19TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS (ICECS), 613 - 616, English

  [Refereed]

  International conference proceedings


• A 6.66-kHz, 940-nW, 56ppm/degrees C, Fully On-chip PVT Variation Tolerant CMOS Relaxation Oscillator

  Keishi Tsubaki, Tetsuya Hirose, Yuji Osaki, Seiichiro Shiga, Nobutaka Kuroki, Masahiro Numa

  2012, 2012 19TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS (ICECS), 97 - 100, English

  [Refereed]

  International conference proceedings


• Current compensation circuit for precise nano-ampere current reference

  ISONO Kosuke, HIROSE Tetsuya, OSAKI Yuji, KUROKI Nobutaka, NUMA Masahiro

  Sep. 2011, 2011 International Conference on Solid State Devices and Materials (SSDM 2011), pp. 176-177, English

  [Refereed]

  International conference proceedings


• Subthreshold SRAM with Write Assist Technique Using On-Chip Threshold Voltage Monitoring Circuit

  Kei Matsumoto, Tetsuya Hirose, Yuji Osaki, Nobutaka Kuroki, Masahiro Numa

  Jun. 2011, IEICE TRANSACTIONS ON ELECTRONICS, E94C(6) (6), 1042 - 1048, English

  [Refereed]

  Scientific journal


• A wide input voltage range level shifter circuit for extremely low-voltage digital LSIs

  Yuji Osaki, Tetsuya Hirose, Nobutaka Kuroki, Masahiro Numa

  Jun. 2011, IEICE ELECTRONICS EXPRESS, 8(12) (12), 890 - 896, English

  [Refereed]

  Scientific journal


• クロス形状フラクタルを用いた画像の高解像度化

  KAWASHIMA Kazumi, CHIKAMATSU Shingo, NAKAYA Tomohiro, KUROKI Nobutaka, HIROSE Tetsuya, NUMA Masahiro

  フラクタル画像符号化を応用した解像度変換手法を提案する.自己相似性を探索する際のブロックの形状とサイズを工夫することにより,高速処理と高画質化を実現した.実験では従来手法の処理時間が24%以上短縮され,更に主観的な品質が向上することを確認した.

  The Institute of Electronics, Information and Communication Engineers, Apr. 2011, 電子情報通信学会論文誌, vol. J94-D, no. 4, pp. 742-745(4) (4), 742 - 745, Japanese

  [Refereed]

  Scientific journal


• Temperature-Compensated Nano-Ampere Current Reference Circuit with Subthreshold Metal-Oxide-Semiconductor Field-Effect Transistor Resistor Ladder

  Yuji Osaki, Tetsuya Hirose, Nobutaka Kuroki, Masahiro Numa

  Apr. 2011, JAPANESE JOURNAL OF APPLIED PHYSICS, 50(4) (4), English

  [Refereed]

  Scientific journal


• カラー画像に対応した画質評価手法VSNRC—VSNR calculation for color images

  河嶋, 和美, 中矢, 知宏, 廣瀬, 哲也, 黒木, 修隆, 沼, 昌宏

  神戸大学大学院工学研究科, 2011, 神戸大学大学院工学研究科・システム情報学研究科紀要, 3, 32 - 39, Japanese

  Research institution


• A 95-nA, 523ppm/°C, 0.6-μWCMOS current reference circuit with subthreshold MOS resistor ladder

  Yuji Osaki, Tetsuya Hirose, Nobutaka Kuroki, Masahiro Numa

  2011, Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC, 113 - 114

  [Refereed]

  International conference proceedings


• Robust Subthreshold CMOS Digital Circuit Design with On-Chip Adaptive Supply Voltage Scaling Technique

  Yuji Osaki, Tetsuya Hirose, Kei Matsumoto, Nobutaka Kuroki, Masahiro Numa

  Jan. 2011, IEICE TRANSACTIONS ON ELECTRONICS, E94C(1) (1), 80 - 88, English

  [Refereed]

  Scientific journal


• A level shifter circuit design by using input/output voltage monitoring technique for ultra-low voltage digital CMOS LSIs

  Yuji Osaki, Tetsuya Hirose, Nobutaka Kuroki, Masahiro Numa

  2011, 2011 IEEE 9th International New Circuits and Systems Conference, NEWCAS 2011, pp. 201-204, 201 - 204, English

  [Refereed]

  International conference proceedings


• High Current Efficiency Sense Amplifier Using Body-Bias Control for Ultra-Low-Voltage SRAM

  Chotaro Masuda, Tetsuya Hirose, Kei Matsumoto, Yuji Osaki, Nobutaka Kuroki, Masahiro Numa

  2011, 2011 IEEE 54TH INTERNATIONAL MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS (MWSCAS), Wp2Track2_1-1, English

  [Refereed]

  International conference proceedings


• A level shifter with logic error correction circuit for extremely low-voltage digital CMOS LSIs

  Yuji Osaki, Tetsuya Hirose, Nobutaka Kuroki, Masahiro Numa

  2011, European Solid-State Circuits Conference, pp. 199-202, 199 - 202, English

  [Refereed]

  International conference proceedings


• A 105-nW CMOS Thermal Sensor for Power-aware Applications

  Toshi Nagayama, Tetsuya Hirose, Yuji Osaki, Nobutaka Kuroki, Masahiro Numa

  2011, 2011 IEEE SENSORS, pp. 1265-1268, 1265 - 1268, English

  [Refereed]

  International conference proceedings


• A 18.9-nA standby current comparator with adaptive bias current generator

  Kosuke Isono, Tetsuya Hirose, Keishi Tsubaki, Nobutaka Kuroki, Masahiro Numa

  2011, 2011 Proceedings of Technical Papers: IEEE Asian Solid-State Circuits Conference 2011, A-SSCC 2011, pp. 237-240, 237 - 240, English

  [Refereed]

  International conference proceedings


• 情報エントロピーに基づく野球中継番組のダイジェスト自動生成

  KATAOKA Mitsuteru, TANAKA Takashi, OGATA yoshitaka, KUROKI Nobutaka, NUMA Masahiro

  We describe an automatic video digesting technique for broadcasted baseball games based on information entropies derived from an overlayed score ticker. The overlayed score ticker of baseball games displays the current score of each team, the inning, and the number of balls/strikes/outs, and whether or not there are runners on base. This information is used to estimate specific events in baseball that we defined: 3 runner situations, 8 batting results, and 4 types of scores. Rare events such as a "home run" have higher information entropy, and frequent events such as "out" have lower entropy. We suppose that an event with higher information entropy is a more important scene for video digesting. Thus, the scenes with higher entropies are selected by priority and embedded into a limited timeline. In our experiment, we applied our technique to broadcasted baseball games and compared it with a conventional sound volume based technique. The two techniques were evaluated subjectively by watching generated videos. We found that our technique has higher performance.

  The Institute of Image Information and Television Engineers, Dec. 2010, 映像情報メディア学会誌, vol.64, no.12, pp.1940-1943(12) (12), 1940 - 1943, Japanese

  [Refereed]

  Scientific journal


• An error diagnosis technique based on clustering of elements

  Kosuke Shioki, Narumi Okada, Kosuke Watanabe, Tetsuya Hirose, Nobutaka Kuroki, Masahiro Numa

  Dec. 2010, IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, E93-A(12) (12), 2490 - 2496, Japanese

  [Refereed]

  Scientific journal


• Level Converter Circuit for Low Voltage Digital LSIs

  OSAKI Yuji, HIROSE Tetsuya, KUROKI Nobutaka, NUMA Masahiro

  Supply voltage scaling in accordance with device scaling has achieved low power dissipation of CMOS LSIs. Because each circuit block in an LSI requires suitable supply voltages, the large voltage gap between each circuit block makes it hard to convert signals between circuit blocks. Therefore, a level converter to solve this problem is a key component for low-voltage LSIs. In this paper, a level converter tolerant to large suply-voltages-gap has been deveolped in a 0.35-μm CMOS process. It can achieve low power operation because it dissipates supply current only when the input signal changes. Measurement results showed that the level converter transformed sinals of 0.4V to 3V.

  The Institute of Image Information and Television Engineers, 2010, ITE Technical Report, 34, 133 - 138, Japanese


• Super-resolution technique for thermography with dual-camera system

  Shingo Chikamatsu, Tomohiro Nakaya, Masakazu Kouda, Nobutaka Kuroki, Tetsuya Hirose, Masahiro Numa

  2010, ISCAS 2010 - 2010 IEEE International Symposium on Circuits and Systems: Nano-Bio Circuit Fabrics and Systems, 1895 - 1898

  [Refereed]

  International conference proceedings


• Write-assisted subthreshold SRAM by using on-chip threshold voltage monitoring circuit

  Kei Matsumoto, Tetsuya Hirose, Yuji Osaki, Nobutaka Kuroki, Masahiro Numa

  2010, Midwest Symposium on Circuits and Systems, 133 - 136

  [Refereed]

  International conference proceedings


• Nano-ampere CMOS current reference with little temperature dependence using small offset voltage

  Yuji Osaki, Tetsuya Hirose, Nobutaka Kuroki, Masahiro Numa

  2010, Midwest Symposium on Circuits and Systems, 668 - 671

  [Refereed]

  International conference proceedings


• A CMOS bandgap and sub-bandgap voltage reference circuits for nanowatt power LSIs

  Tetsuya Hirose, Ken Ueno, Nobutaka Kuroki, Masahiro Numa

  2010, 2010 IEEE Asian Solid-State Circuits Conference, A-SSCC 2010, 77 - 80

  [Refereed]

  International conference proceedings


• A nano-ampere current reference circuit and its temperature dependence control by using temperature characteristics of carrier mobilities

  Tetsuya Hirose, Yuji Osaki, Nobutaka Kuroki, Masahiro Numa

  2010, ESSCIRC 2010 - 36th European Solid State Circuits Conference, 114 - 117

  [Refereed]

  International conference proceedings


• An error diagnosis technique based on location sets to rectify subcircuits

  Kosuke Shioki, Narumi Okada, Toshiro Ishihara, Tetsuya Hirose, Nobutaka Kuroki, Masahiro Numa

  Dec. 2009, IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, E92-A(12) (12), 3136 - 3142, English

  [Refereed]

  Scientific journal


• Automatic Video Digesting Technique for Broadcasted Baseball Games Based on Telop Data

  Tanaka Takashi, Ogata Yoshitaka, Kataoka Mitsuteru, Kuroki Nobutaka, Numa Masahiro

  This paper presents an automatic video-digesting technique for broadcasted baseball games based on telop data on TV. We analyze a progress of a baseball game with score telops and collect important scenes based on information entropies for baseball events. Since rare events such as "home run" have high entropies and frequent events such as "out" have low ones, we collect a scenes including high entropy events. Thus a digest video including much information for limited time is generated. In the experiments, we compared the proposed technique with a conventional technique based on sound information and ensured its utility.

  The Institute of Image Information and Television Engineers, 2009, ITE Technical Report, 33, 25 - 28, Japanese


• Delay Variation Tolerant Subthreshold Digital Circuits for Ultra-Low Power

  OSAKI Yuji, HIROSE Tetsuya, MATSUMOTO Kei, KUROKI Nobutaka, NUMA Masahiro

  Subthreshold LSIs can achieve ultra-low power. However, threshold voltage variations with temperature and fabrication process have significant impact on the circuit performance. In subthreshold digital circuits, delay time changes exponentially with threshold-voltage variations. To solve this problem, we propose a delay-compensation technique for subthreshold digital circuits. On-chip threshold-voltage monitoring and supply-voltage scaling are adopted to mitigate threshold-voltage variations. As examples of subthreshold digital circuits, we have evaluated the delay time in a ring oscillator and an 8-bit ripple carry adder. With the proposed techinque, the delay time can be improved from log-normal to normal distribution.

  The Institute of Image Information and Television Engineers, 2009, ITE Technical Report, 33, 165 - 170, Japanese


• Switching-voltage detection and compensation circuits for ultra-low-voltage CMOS inverters

  Kei Matsumoto, Tetsuya Hirose, Yuji Osaki, Nobutaka Kuroki, Masahiro Numa

  2009, Midwest Symposium on Circuits and Systems, 483 - 486

  [Refereed]

  International conference proceedings


• Delay-compensation techniques for ultra-low-power subthreshold CMOS digital LSIs

  Yuji Osaki, Tetsuya Hirose, Kei Matsumoto, Nobutaka Kuroki, Masahiro Numa

  2009, Midwest Symposium on Circuits and Systems, 503 - 506

  [Refereed]

  International conference proceedings


• Detection of duplicated scenes from MPEG streams based on generated code size

  Nobutaka Kuroki, Yuji Hirose, Mitsutaka Susuki, Mitsuteru Kataoka, Masahiro Numa, Keisuke Yamamoto

  Nov. 2006, Kyokai Joho Imeji Zasshi/Journal of the Institute of Image Information and Television Engineers, 60(11) (11), 1823 - 1828, Japanese

  [Refereed]

  Scientific journal


• 生成符号量に着目したMPEGストリーム中における重複シーンの検出

  黒木 修隆, 廣瀬 裕二, 薄 充孝, 片岡 充照, 沼 昌宏, 山本 啓輔

  Nov. 2006, 映像情報メディア学会誌, vol.60, no.11, pp.1823-1828, Japanese

  [Refereed]

  Scientific journal


• An evaluation of triple density error diffusion for medical monochrome LCDs

  Nobutaka Kuroki, Nobuhiro Oka, Masahiro Numa, Keisuke Yamamoto

  Jun. 2006, IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES, E89A(6) (6), 1866 - 1868, English

  [Refereed]

  Scientific journal


• Estimation of user preference for TV programs based on channel operations

  Nobutaka Kuroki, Yuji Hiroset, Tatsuya Suzuki, Mitsuteru Kataoka, Masahiro Numa, Keisuke Yamamoto

  Mar. 2006, Kyokai Joho Imeji Zasshi/Journal of the Institute of Image Information and Television Engineers, 60(3) (3), 454 - 457, Japanese

  [Refereed]

  Scientific journal


• テレビ視聴者の選局行動に基づく番組嗜好度の推定

  KUROKI Nobutaka, HIROSE Yuji, SUZUKI Tatsuya, KATAOKA Mitsuteru, NUMA Masahiro, YAMAMOTO Keisuke

  Mar. 2006, 映像情報メディア学会誌, Vol. 60,No. 3, pp.454-457, Japanese

  [Refereed]

  Scientific journal


• 社内環境における頭部追跡を目的とした赤外線マルチカメラシステムの開発

  黒木 修隆, 山根 知之, 小西 晋平, 沼 昌宏, 山本 啓輔

  2005, 電子情報通信学会論文誌, J88-A(2),142-151, Japanese

  [Refereed]


• Triple density error diffusion for medical monochrome LCDs and evaluation of its performance

  OKA N, KUROKI Nobutaka, NUMA Masahiro, YAMAMOTO Keisuke

  2004, 11th International Display Workshops(IDW2004), 1643-1645, English

  [Refereed]

  Scientific journal


• Extraction of subcircuits for incremental synthesis based on error diagbosis

  IIDA Takayuki, SUGANE Toshifumi, IWASAKI Takahiro, INOUE Hiroshi, KUROKI Nobutaka, NUMA Masahiro, YAMAMOTO Keisuke

  2004, 12th Workshop on synthesis and system Integration of Mixed Information Technologies(SASIMI2004), 345-350, English

  [Refereed]

  Scientific journal


• Error diagnosis techniquie based on boolean resubstitution

  SUGANE Toshifumi, ARAI R, IIDA Takayuki, INOUE Hiroshi, KUROKI Nobutaka, NUMA Masahiro

  2004, 12th Workshop on synthesis and system Integration of Mixed Information Technologies(SASIMI2004), 339-344, English

  [Refereed]

  Scientific journal


• Reduction of FFT circuit area for OFDM demodulator based on skipping-point representation

  M Nakanishi, H Kobatake, N Kobayashi, N Kuroki, M Numa, K Kawashima, K Yamamoto

  2004, PROCEEDINGS OF 2004 IEEE ASIA-PACIFIC CONFERENCE ON ADVANCED SYSTEM INTEGRATED CIRCUITS, 430-431, 430 - 431, English

  [Refereed]

  International conference proceedings


• Lossless coding of color quantized images based on pseudo distance

  N Kuroki, T Yamane, M Numa

  2004, 2004 47TH MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL I, CONFERENCE PROCEEDINGS, 1,245-247, 245 - 247, English

  [Refereed]

  International conference proceedings


• Improvement of image quality by optical image processing suitable for pixel shape of display

  T Manabe, N Kuroki, M Numa, K Yamamoto

  2004, 2004 47TH MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL I, CONFERENCE PROCEEDINGS, 1,305-308, 305 - 308, English

  [Refereed]

  International conference proceedings


• An LUT-based error diagnosis technique improved in multiplicity of rectifiable errors

  T Sugane, T Iida, H Inoue, N Kuroki, M Numa, K Yamamoto

  2004, 2004 47TH MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL I, CONFERENCE PROCEEDINGS, 1,525-528, 525 - 528, English

  [Refereed]

  International conference proceedings


• An approach for integration of demodulators for digital broadcasting

  H Kobatake, K Hirano, N Kuroki, M Numa, H Nishida, K Kawashima, K Yamamoto

  2004, PROCEEDINGS OF 2004 IEEE ASIA-PACIFIC CONFERENCE ON ADVANCED SYSTEM INTEGRATED CIRCUITS, 416-417, 416 - 417, English

  [Refereed]

  International conference proceedings


• Adaptive arithmetic coding for image prediction errors

  N Kuroki, T Manabe, M Numa

  2004, 2004 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL 3, PROCEEDINGS, 111,961-964, 961 - 964, English

  [Refereed]

  International conference proceedings


• 信号線誤りに対応したLUT 論理診断手法

  井上 宏, 黒木 修隆, 沼 昌宏, 山本 啓輔

  This paper presents an approach to rectify multiple logic design errors including single tine errors in LUT-based combinational circuits. Single line errors are classified into missing-line errors and extra-line errors. Although the conventional technique called EXL_ is able to rectify extra-Hue errors only by correcting LUT contents, but is not applicable to missing-line errors. Rectification of missing-line errors requires both correcting LUT contents and finding a line to be connected to the LUT. Since the condition to be satisfied with the missing-line depends on the LUT contents at the error location, rectification of missing lines is very difficult. The proposed algorithm introduces the condition derived from the characteristic function to represent Boolean relation among the primary input variables and the truth variables assigned to each entry of LUT. Since the characteristic function implicitly represents the condition for any possible assignment of truth variables, every solution is obtained.

  Information Processing Society of Japan (IPSJ), 2003, 情報処理学会論文誌, 44(5),1216-1224(5) (5), 1216 - 1224, Japanese

  [Refereed]

  Scientific journal


• Layered blind deconvolution with interband prediction

  Hirokazu Masuda, Nobutaka Kuroki, Masahiro Numa, Kotaro Hirano

  Scripta Technica Inc, Mar. 2000, Systems and Computers in Japan, 31(3) (3), 77 - 83, English

  [Refereed]

  Scientific journal


• HAAR WAVELET TRANSFORM WITH INTERBAND PREDICTION AND ITS APPLICATION TO IMAGE-CODING

  N KUROKI, M NUMA, T NOMURA, M KAMEDA, K HIRANO

  Apr. 1995, ELECTRONICS AND COMMUNICATIONS IN JAPAN PART III-FUNDAMENTAL ELECTRONIC SCIENCE, 78(4) (4), 103 - 114, English

  Scientific journal


• LOSSLESS IMAGE COMPRESSION BY 2-DIMENSIONAL LINEAR PREDICTION WITH VARIABLE-COEFFICIENTS

  N KUROKI, T NOMURA, M TOMITA, K HIRANO

  Jul. 1992, IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES, E75A(7) (7), 882 - 889, English

  [Refereed]

  Scientific journal

• バイオリン装着型カメラと画像認識AIを用いた運弓動作の解析と技量評価に関する研究

  鯖戸皐生, 黒木修隆, 沼 昌宏

  Feb. 2025, 電子情報通信学会 技術研究報告, 124(373) (373), 231 - 236, Japanese


• AIによるジャンプ分類のためのフィギュアスケート選手の動作解析に関する研究

  椿井友也, 黒木修隆, 沼 昌宏

  Mar. 2024, 電子情報通信学会 技術研究報告, 123(433) (433), 220 - 223, Japanese

  Summary national conference


• MediaPipe Handsとゲートタイム情報を利用したピアノ演奏の運指認識に関する研究

  倉地明陽, 黒木修隆, 沼 昌宏

  Mar. 2024, 電子情報通信学会 技術研究報告, 123(433) (433), 25 - 28, Japanese

  Summary national conference


• Lightweight CNN Model Based on MobileOne by Applying Incremental Network Quantization

  横田俊介, 黒木修隆, 沼昌宏

  2024, 情報科学技術フォーラム講演論文集, 23rd


• On Ratio of Embedded RECON Spare Cell Types for Technology Remapping

  鍋谷泰彬, 黒木修隆, 沼昌宏

  2024, 情報科学技術フォーラム講演論文集, 23rd


• Improving the Efficiency of Truth Variable Simulation by Changing the Order of Input Patterns to Be Applied

  坂本和輝, 黒木修隆, 沼昌宏

  2024, 情報科学技術フォーラム講演論文集, 23rd


• Camera Motion Estimation Using Feature Points in Basketball Broadcast Video

  田中大晴, 黒木修隆, 沼昌宏

  2024, 情報科学技術フォーラム講演論文集, 23rd


• Position Estimation of Moving Objects in Soccer Game Video Using YOLOv7 and Kalman Filter

  山上修市, 黒木修隆, 沼昌宏

  2024, 情報科学技術フォーラム講演論文集, 23rd


• A study on 3D analysis of volleyball video using YOLOv7

  和泉湧士, 黒木修隆, 沼昌宏

  2024, 情報科学技術フォーラム講演論文集, 23rd


• Quantitative Evaluation of Synchronous Dance Using YOLOv7-Pose-Estimation

  黒崎大希, 黒木修隆, 沼昌宏

  2024, 情報科学技術フォーラム講演論文集, 23rd


• Reducing the Number of Parameters in Object Detection Models for FPGA Implementation of Surveillance Camera Systems

  石川翔太, 黒木修隆, 沼昌宏

  2024, 情報科学技術フォーラム講演論文集, 23rd


• Switched-capacitor voltage boost converter with digital maximum power point tracking for low-voltage energy harvesting

  K. Matsumoto, R. Ikeda, H. Sebe, N. Kuroki, M. Numa, D. Kanemoto, T. Hirose

  Oct. 2023, IEEE EDS Kansai Chapter, The 23rd Kansai Colloquium Electron Devices Workshop, Japanese

  Summary national conference


• デジタルメイクのための流行スタイルの学習および推薦システムの実装

  佐藤禎美, 黒木修隆, 沼 昌宏

  Sep. 2023, Visual Computing 2023, (P15) (P15), Japanese

  Summary national conference


• CycleGANを用いた画像生成による内観シミュレーションに関する研究

  葉木達也, 黒木修隆, 沼 昌宏

  Sep. 2023, Visual Computing 2023, (P12) (P12), Japanese

  Summary national conference


• 単眼カメラによるバドミントン選手の追跡とコート上の位置推定

  片平悠斗, 黒木修隆, 沼 昌宏

  Sep. 2023, 第22回情報科学技術フォーラム (FIT2023), (H-036) (H-036), Japanese

  Summary national conference


• YOLOv7を用いたドラム譜の認識のための音楽記号の分解と統合に関する研究

  小椋隆生, 黒木修隆, 沼 昌宏

  Sep. 2023, (H-035) (H-035), Japanese

  Summary national conference


• 多ゲートRECONセルを用いた論理再合成手法

  西口友浩, 黒木修隆, 沼 昌宏

  Sep. 2023, 第22回情報科学技術フォーラム (FIT2023), (C-007) (C-007), Japanese

  Summary national conference


• Separable畳み込みを用いた単眼深度推定ネットワークの軽量化

  沼田和樹, 黒木修隆, 沼 昌宏

  Sep. 2023, 第22回情報科学技術フォーラム (FIT2023), (C-002) (C-002), Japanese

  Summary national conference


• 層多重化構造に基づくCNNのハードウェア化に向けた適応的グループ化畳み込み手法

  河端佑一郎, 黒木修隆, 沼 昌宏

  Sep. 2023, 第22回情報科学技術フォーラム(FIT2023), (C-001) (C-001), Japanese

  Summary national conference


• YOLOv7を用いた五線譜の遠近補正と音符の認識に関する研究

  神谷 媛, 黒木修隆, 沼 昌宏

  Aug. 2023, 第138回音楽情報科学研究発表会, (11) (11), Japanese

  Summary national conference


• デジタルMPPT制御を用いた小型PVセル向けオンチップ昇圧コンバータ

  松本 香, 池田隆希, 瀬部 光, 黒木修隆, 沼 昌宏, 兼本大輔, 廣瀬哲也

  May 2023, LSIとシステムのワークショップ2023, Japanese

  Summary national conference


• A 35-mV supply ring oscillator consisting of stacked body bias inverters for extremely low-voltage LSIs

  Nishi Masaya, Matsumoto Kaori, Kuroki Nobutaka, Numa Masahiro, Sebe Hikaru, Matsuzuka Ryo, Maida Osamu, Kanemoto Daisuke, Hirose Tetsuya

  2021, IEICE Electronics Express (Web), 18(6) (6)


• Design of Hysteresis Comparator for Active Diode

  松本 香, 廣瀬 哲也, 浅野 大樹, 辻 佑斗, 中澤 勇一郎, 黒木 修隆, 沼 昌宏

  [電子情報通信学会], 17 May 2018, 回路とシステムワークショップ論文集 Workshop on Circuits and Systems, 31, 74 - 79, Japanese


• A fully on-chip, ultra-low power RC oscillator with current mode architecture for real time clock applications

  浅野 大樹, 廣瀬 哲也, 椿 啓志, 三好 太朗, 尾崎 年洋, 黒木 修隆, 沼 昌宏

  電子情報通信学会, 30 Jan. 2017, 電子情報通信学会技術研究報告 = IEICE technical report : 信学技報, 116(446) (446), 81 - 86, Japanese


• An Efficient and Small-Scaled RNN Hardware Architecture Based on Approximation of RNN Algorithm for Hardware Implementation

  村田 大智, 廣瀬 哲也, 黒木 修隆, 沼 昌宏

  電子情報通信学会, 05 Sep. 2016, 電子情報通信学会技術研究報告 = IEICE technical report : 信学技報, 116(210) (210), 69 - 74, Japanese


• A fast-start up and fully-integrated 32-MHz clock generator for intermittent VLSI systems

  浅野 大樹, 廣瀬 哲也, 三好 太朗, 椿 啓志, 尾崎 年洋, 黒木 修隆, 沼 昌宏

  映像情報メディア学会, Aug. 2016, 映像情報メディア学会技術報告 = ITE technical report, 40(24) (24), 3 - 8, Japanese


• A fast-start up and fully-integrated 32-MHz clock generator for intermittent VLSI systems

  浅野 大樹, 廣瀬 哲也, 三好 太朗, 椿 啓志, 尾崎 年洋, 黒木 修隆, 沼 昌宏

  電子情報通信学会, 01 Aug. 2016, 電子情報通信学会技術研究報告 = IEICE technical report : 信学技報, 116(173) (173), 3 - 8, Japanese


• H-022 Anomalous Behavior Detection in Videos based on Deformable Part Models

  Sugimoto Tamotsu, Kuroki Nobutaka, Hirose Tetsuya, Numa Masahiro

  Forum on Information Technology, 24 Aug. 2015, 情報科学技術フォーラム講演論文集, 14(3) (3), 177 - 178, Japanese


• I-022 Three Dimensional NL-Means method for denoising of continuous shooting photography

  Kobori Hirokazu, Kuroki Nobutaka, Hirose Tetduya, Numa Masahiro

  Forum on Information Technology, 24 Aug. 2015, 情報科学技術フォーラム講演論文集, 14(3) (3), 245 - 246, Japanese


• H-023 Applying Supervised Pre-Training to Network in Network for Precise Image Recognition

  Furui Shuya, Kuroki Nobutaka, Hirose Tetsuya, Numa Masahiro

  Forum on Information Technology, 24 Aug. 2015, 情報科学技術フォーラム講演論文集, 14(3) (3), 179 - 180, Japanese


• I-021 Noise Reduction for Medical Tomographic Images based on Locally Weighted Averaging

  Kato Yu, Kuroki Nobutaka, Hirose Tetsuya, Numa Masahiro

  Forum on Information Technology, 24 Aug. 2015, 情報科学技術フォーラム講演論文集, 14(3) (3), 243 - 244, Japanese


• C-010 A Hardware Architecture to Perform K-means Clustering for Learning-Based Super-Resolution Combining Self-Learning and Prior-Learning Dictionaries

  Murata Daichi, Kiriyama Ayumi, Shizuku Yuzuru, Hirose Tetsuya, Kuroki Nobutaka, Numa Masahiro

  Forum on Information Technology, 24 Aug. 2015, 情報科学技術フォーラム講演論文集, 14(1) (1), 253 - 254, Japanese


• Function approximation of visual importance for image quality assessment

  IZUMI Naoyuki, KUROKI Nobutaka, HIROSE Tetsuya, NUMA Masahiro

  This paper studies the function approximation of visual importance map that can be used for general purposes in image quality assessment. Conventional techniques that estimate the visual importance by eye tracking have many problems such as a loss of time, an enormous effort of a preliminary experiment, and an expensive equipment. Therefore, by analyzing the correlation between SSIM in local areas and subjective evaluation of the image, we estimate the human's gazing area and create the visual importance map. Experimental results have shown the high correlation between subjective evaluation and weighted SSIM based on the visual importance map. The proposed technique can be used widely even if the ROI is unknown.

  The Institute of Electronics, Information and Communication Engineers, 13 Dec. 2013, 電子情報通信学会技術研究報告 = IEICE technical report : 信学技報, 113(350) (350), 11 - 14, Japanese


• I-033 Learning of Geometric Patterns in Example-Based Super-Resolution

  Tsuchikawa Kento, Sugahara Yuki, Izumi Naoyuki, Kuroki Nobutaka, Hirose Tetsuya, Numa Masahiro

  Forum on Information Technology, 20 Aug. 2013, 情報科学技術フォーラム講演論文集, 12(3) (3), 317 - 318, Japanese


• I-034 Architecture of Electric Zooming with Super Resolution and Error Feedback

  Sugahara Yuki, Tsuchikawa Kento, Kuroki Nobutaka, Hirose Tetsuya, Numa Masahiro

  Forum on Information Technology, 20 Aug. 2013, 情報科学技術フォーラム講演論文集, 12(3) (3), 319 - 320, Japanese


• H-015 An Architecture of HOG Based Classifier and Its Application to Pedestrian Detection

  Goto Hiroki, Ijiri Syouta, Oura Junki, Kuroki Nobutaka, Hirose Tetsuya, Numa Masahiro

  Forum on Information Technology, 20 Aug. 2013, 情報科学技術フォーラム講演論文集, 12(3) (3), 123 - 124, Japanese


• C-12-61 ARELAXATION OSCILLATOR FOR REAL TIME CLOCK WITH LOW REFERENCE VOLTAGE

  Tsubaki Keishi, Hirose Tetsuya, Kuroki Nobutaka, Numa Masahiro

  The Institute of Electronics, Information and Communication Engineers, 05 Mar. 2013, Proceedings of the IEICE General Conference, 2013(2) (2), 132 - 132, Japanese


• C-12-48 Ultra-Low Power and High Speed Rail-to-Rail Operational Amplifier with Adaptive Biasing Technique

  Ozaki T, Hirose T., Tsubaki K., Kuroki N., Numa M.

  The Institute of Electronics, Information and Communication Engineers, 05 Mar. 2013, Proceedings of the IEICE General Conference, 2013(2) (2), 119 - 119, Japanese


• A Study of JPEG Codec with Super-Resolution

  KIYOKAWA MASANORI, KUROKI NOBUTAKA, HIROSE TETSUYA, NUMA MASAHIRO

  This paper proposes a new JPEG codec in which super-resolution technique.AC coefficients are predicted from DC coefficients by a

  The Institute of Electronics, Information and Communication Engineers, 06 Dec. 2012, IEICE technical report. Image engineering, 112(335) (335), 27 - 30, Japanese


• A Study of JPEG Codec with Super-Resolution

  清川 正徳, 黒木 修隆, 廣瀬 哲也

  映像情報メディア学会, Dec. 2012, 映像情報メディア学会技術報告, 36(53) (53), 27 - 30, Japanese


• A Study of JPEG Codec with Super-Resolution

  清川 正徳, 黒木 修隆, 廣瀬 哲也, 沼 昌宏

  JPEG コーデックの内部で算出される DC 成分に対して 8×8 倍の超解像拡大を行うことにより， AC 成分を予測・生成する方式を提案する．This paper proposes a new JPEG codec in which AC coefficients are predicted from DC coefficients by a super-resolution technique.

  29 Nov. 2012, 研究報告オーディオビジュアル複合情報処理（AVM）, 2012(6) (6), 1 - 4, Japanese


• Relationship between subjective qualities and SSIM of color imager

  IZUMI Naoyuki, KUROKI Nobutaka, HIROSE Tetsuya, NUMA Masahiro

  This paper studies a SSIM based-quality assessment for color images. Though SSIM metrics is similar to human subjective evaluation for gray-scale images, it can not evaluate images including degradations in color difference signals because it evaluates only a luminance signal. We incorporate new evaluation terms for the color difference signals into the conventional formula. The weights for them are determined in our experiment subjectively. Experimental results showed that the correlation coefficient between SSIM and subjective evaluation was improved.

  The Institute of Electronics, Information and Communication Engineers, 05 Oct. 2012, 電子情報通信学会技術研究報告. IMQ, イメージ・メディア・クオリティ : IEICE technical report, 112(234) (234), 7 - 10, Japanese


• H-004 Layout Recognition of Score Ticker on Broadcasted Baseball Games

  Sadamoto Taishi, Kuroki Nobutaka, Hirose Tetsuya, Numa Masahiro

  Forum on Information Technology, 04 Sep. 2012, 情報科学技術フォーラム講演論文集, 11(3) (3), 123 - 124, Japanese


• I-005 Similar Scene Detection in Broadcasted Videos using Bag-of-Visual Words

  Ijiri Shota, Sadamoto Taishi, Kuroki Nobutaka, Hirose Tetsuya, Numa Masahiro

  Forum on Information Technology, 04 Sep. 2012, 情報科学技術フォーラム講演論文集, 11(3) (3), 243 - 244, Japanese


• I-011 Architecture of Electronic Zooming with Hierarchical Super Resolution

  Sugahara Yuki, Hashimoto Akinobu, Kuroki Nobutaka, Hirose Tetsuya, Numa Masahiro

  Forum on Information Technology, 04 Sep. 2012, 情報科学技術フォーラム講演論文集, 11(3) (3), 261 - 262, Japanese


• H-029 Layout Recognition of Objects and Labels Based on Combination Optimization Algorithm

  Oura Junki, Tsuji Ryoya, Kuroki Nobutaka, Hirose Tetsuya, Numa Masahiro

  Forum on Information Technology, 04 Sep. 2012, 情報科学技術フォーラム講演論文集, 11(3) (3), 181 - 182, Japanese


• B-004 A Technique for GPU-Based Acceleration of Learning-Based Super-Resolution Using Wavelet Transform

  Sakamoto Hiroyuki, Sasaki Jin, Shizuku Yuzuru, Kuroki Nobutaka, Hirose Tetsuya, Numa Masahiro

  Forum on Information Technology, 04 Sep. 2012, 情報科学技術フォーラム講演論文集, 11(1) (1), 173 - 174, Japanese


• B-005 A Technique for GPU-Based Acceleration of Classifier with Weighted Majority Voting for Multimodal Input

  Sasaki Jin, Sakamoto Hiroyuki, Shizuku Yuzuru, Kuroki Nobutaka, Hirose Tetsuya, Numa Masahiro

  Forum on Information Technology, 04 Sep. 2012, 情報科学技術フォーラム講演論文集, 11(1) (1), 175 - 176, Japanese


• C-12-24 A PVT Variation Tolerant Single Slope AD Converter

  Osaki Yuji, Hirose Tetsuya, Kuroki Nobutaka, Numa Masahiro

  The Institute of Electronics, Information and Communication Engineers, 28 Aug. 2012, Proceedings of the Society Conference of IEICE, 2012(2) (2), 97 - 97, Japanese


• C-12-23 A High Resolution Offset Calibration Technique for Ultra-Low-Voltage Dynamic Comparator

  Masuda Chotaro, Hirose Tetsuya, Osaki Yuji, Kuroki Nobutaka, Numa Masahiro

  The Institute of Electronics, Information and Communication Engineers, 28 Aug. 2012, Proceedings of the Society Conference of IEICE, 2012(2) (2), 96 - 96, Japanese


• C-12-18 A CMOS Operational Amplifier with Adaptive Biasing for Ultra Low-power LSIs

  Tsuruya Y., Hirose T., Osaki Y., Kuroki N., Numa M., Kobayashi O.

  The Institute of Electronics, Information and Communication Engineers, 28 Aug. 2012, Proceedings of the Society Conference of IEICE, 2012(2) (2), 91 - 91, Japanese


• C-12-17 A Relaxation Oscillator with Variation Compensation Techniques for Comparator

  Tsubaki Keishi, Hirose Tetsuya, Osaki Yuji, Shiga Seiichiro, Kuroki Nobutaka, Numa Masahiro

  The Institute of Electronics, Information and Communication Engineers, 28 Aug. 2012, Proceedings of the Society Conference of IEICE, 2012(2) (2), 90 - 90, Japanese


• A Study of Quality Assessment for Color Images

  IZUMI Naoyuki, NAKAYA Tomohiro, KAWASHIMA Kazumi, KUROKI Nobutaka, HIROSE Tetsuya, NUMA Masahiro

  This paper studies a VSNR based-quality assessment for color images. Though VSNR metrics is similar to human subjective evaluation for gray-scale images, it can not evaluate images including degradations in color difference signals because it evaluates only a luminance signal. We incorporate new evaluation terms for the color difference signals into the conventional formula. The weights for them are determined in our experiment subjectively. Experimental results showed that the proposed assessment has high correlation to the human subjective evaluation.

  The Institute of Electronics, Information and Communication Engineers, 22 Mar. 2012, Technical report of IEICE. PRMU, 111(499) (499), 193 - 198, Japanese


• C-12-53 Switched-Capacitor DC-DC Converter with Adaptive Bias Current Generating Comparator

  Nakamura Daigo, Hirose Tetsuya, Osaki Yuji, Kuroki Nobutaka, Numa Masahiro

  The Institute of Electronics, Information and Communication Engineers, 06 Mar. 2012, Proceedings of the IEICE General Conference, 2012(2) (2), 125 - 125, Japanese


• C-12-49 A Study on Offset Calibration Technique for Ultra-Low-Voltage Dynamic Comparator

  Masuda Chotaro, Hirose Tetsuya, Osaki Yuji, Kuroki Nobutaka, Numa Masahiro

  The Institute of Electronics, Information and Communication Engineers, 06 Mar. 2012, Proceedings of the IEICE General Conference, 2012(2) (2), 121 - 121, Japanese


• C-12-52 A Low Voltage Nano-Ampere Current Reference Circuit

  Kitamura Junya, Hirose Tetsuya, Osaki Yuji, Kuroki Nobutaka, Numa Masahiro

  The Institute of Electronics, Information and Communication Engineers, 06 Mar. 2012, Proceedings of the IEICE General Conference, 2012(2) (2), 124 - 124, Japanese


• C-12-54 Boost Converter with Quasi-Continuous-Mode Digital Control

  Saito Yusuke, Hirose Tetsuya, Osaki Yuji, Kuroki Nobutaka, Numa Masahiro

  The Institute of Electronics, Information and Communication Engineers, 06 Mar. 2012, Proceedings of the IEICE General Conference, 2012(2) (2), 126 - 126, Japanese


• C-12-42 High Speed Technique of Ultra-Low Power Operational Amplifier

  Tsuruya Y., Hirose T., Osaki Y., Kuroki N., Numa M., Kobayashi O.

  The Institute of Electronics, Information and Communication Engineers, 06 Mar. 2012, Proceedings of the IEICE General Conference, 2012(2) (2), 114 - 114, Japanese


• A-1-19 Load Characteristics Improvement of Charge Pump Circuits for Light Energy Harvesting

  Nagai Takahiro, Hirose Tetsuya, Osaki Yuji, Kuroki Nobutaka, Numa Masahiro

  The Institute of Electronics, Information and Communication Engineers, 06 Mar. 2012, Proceedings of the IEICE General Conference, 2012, 19 - 19, Japanese


• A-1-20 Improvement of Efficiency by Reduction in Reverse Current of Differential-Drive CMOS Rectifier

  Tsukamoto M., Hirose T., Osaki Y., Kuroki N., Numa M., Hashimoto M.

  The Institute of Electronics, Information and Communication Engineers, 06 Mar. 2012, Proceedings of the IEICE General Conference, 2012, 20 - 20, Japanese


• A-1-45 Analysis of Reduction in Capacitive DAC for High Resolution SAR ADC

  Yamauchi Takahito, Hirose Tetsuya, Osaki Yuji, Kuroki Nobutaka, Numa Masahiro

  The Institute of Electronics, Information and Communication Engineers, 06 Mar. 2012, Proceedings of the IEICE General Conference, 2012, 45 - 45, Japanese


• Smart Dictionary for Learning-Based Super-Resolution

  Hashimoto Akinobu, Nakaya Tomohiro, Kuroki Nobutaka, Hirose Tetsuya, Numa Masahiro

  In this paper, a novel dictionary construction technique for example based super-resolution is proposed. Conventional technique needs enormous number of images to make a dictionary describing pairs of low frequency components and high frequency components. As a result, the dictionary size increases and the search speed decreases. On the other hand, our goal is to maximize the ratio between PSNR and dictionary size. We use only a image to make a very small dictionary with a binary tree structure. Experimental results have shown that the proposed dictionary of only 536 patches can improve PSNR about 1 dB.

  The Institute of Electronics, Information and Communication Engineers, 11 Nov. 2011, IEICE technical report. Image engineering, 111(284) (284), 35 - 40, Japanese


• 学習型超解像のための高能率な辞書

  ハシモト アキノブ, ナカヤ トモヒロ, クロキ ノブタカ

  In this paper, a novel dictionary construction technique for example based super-resolution is proposed. Conventional technique needs enormous number of images to make a dictionary describing pairs of low frequency components and high frequency components. As a result, the dictionary size increases and the search speed decreases. On the other hand, our goal is to maximize the ratio between PSNR and dictionary size. We use only a image to make a very small dictionary with a binary tree structure. Experimental results have shown that the proposed dictionary of only 536 patches can improve PSNR about 1 dB.

  映像情報メディア学会, Nov. 2011, 映像情報メディア学会技術報告 = ITE technical report, 35(45) (45), 35 - 40, Japanese


• I-025 Search and generation technique for high-frequency patches in learning-based super-resolution

  Nakaya Tomohiro, Chikamatsu Shingo, Kuroki Nobutaka, Hirose Tetsuya, Numa Masahiro

  Forum on Information Technology, 07 Sep. 2011, 情報科学技術フォーラム講演論文集, 10(3) (3), 337 - 338, Japanese


• H-010 Classifier with Weighted Majority Voting for Multimodal Input

  Tsuji Ryoya, Nishida Takashi, Momosaki Masashi, Kuroki Nobutaka, Hirose Tetsuya, Numa Masahiro

  Forum on Information Technology, 07 Sep. 2011, 情報科学技術フォーラム講演論文集, 10(3) (3), 123 - 124, Japanese


• C-12-6 Clock Reference Circuit using Compensation Circuit for Comparators

  Shiga Seichiro, Hirose Tetsuya, Osaki Yuji, Kuroki Nobutaka, Numa Masahiro

  The Institute of Electronics, Information and Communication Engineers, 30 Aug. 2011, Proceedings of the Society Conference of IEICE, 2011(2) (2), 81 - 81, Japanese


• C-12-51 A CMOS Thermal Sensor for Ultra Low-power LSIs

  Nagayama Toshi, Hirose Tetsuya, Osaki Yuji, Kuroki Nobutaka, Numa Masahiro

  The Institute of Electronics, Information and Communication Engineers, 30 Aug. 2011, Proceedings of the Society Conference of IEICE, 2011(2) (2), 126 - 126, Japanese


• A Level Shifter with Logic Error Correction Circuit for Low-Voltage Digital LSIs

  OSAKI Yuji, HIROSE Tetsuya, KUROKI Nobutaka, NUMA Masahiro

  A level shifter circuit capable of extremely low-voltage inputs is presented in this paper. The circuit consists of a level conversion circuit and a logic error correction circuit. The level conversion circuit generates output voltage signal according to the voltage difference between complementary input signals. The logic error correction circuit has a distinctive feature in current generation scheme by detecting input and output logic levels. The proposed circuit can convert low-voltage input digital signals into high-voltage output digital signals. The circuit achieves low-power operation because it dissipates operating current only when the input signals change. Measurement results demonstrated that the circuit can convert low-oltage input signals of 0.4V into 3V output signals. The power dissipation was 58 nW at 0.4-V and 10-kHz input pulse.

  The Institute of Electronics, Information and Communication Engineers, 14 Jul. 2011, IEICE technical report, 111(151) (151), 1 - 6, Japanese


• A Sense Amplifier with High Speed Pre-Charge Operation for Ultra-Low-Voltage SRAM

  MASUDA Chotaro, HIROSE Tetsuya, OSAKI Yuji, KUROKI Nobutaka, NUMA Masahiro

  We propose a current latch sense amplifier with a current-reuse technique (CLSA-w/CR). The CLSA-w/CR is capable of high-speed pre-charging with little increase in power dissipation. The CLSA-w/CR controls body bias voltages of pre-charge transistors in a conventional CLSA. Even though a forward body bias control over MOSFETs can achieve high-speed operation of the circuit, it induces large substrate leakage current and increases the power dissipation of the circuit. The CLSA-w/CR we propose, however, can achieve high-speed precharging without increasing power dissipation. We evaluated the performance of the CLSA-w/CR using SPICE with a set of 0.35- μm standard CMOS parameters. The pre-charge time decreased by 86.9% and the power dissipation increased by only 8.6% compared to that of a conventional CLSA. The CLSA-w/CR showed high-speed pre-charging with small power overhead.

  The Institute of Electronics, Information and Communication Engineers, 14 Jul. 2011, IEICE technical report, 111(151) (151), 7 - 12, Japanese


• A level shifter with logic error correction circuit for low-voltage digital LSIs

  大崎 勇士, 廣瀬 哲也, 黒木 修隆

  映像情報メディア学会, Jul. 2011, ITE technical report, 35(28) (28), 1 - 6, Japanese


• A-1-4 High Speed Precharge of Sense Amplifer for Ultra-Low-Voltage SRAM Ciruits

  Masuda Chotaro, Hirose Tetsuya, Osaki Yuji, Matsumoto Kei, Kuroki Nobutaka, Numa Masahiro

  The Institute of Electronics, Information and Communication Engineers, 28 Feb. 2011, Proceedings of the IEICE General Conference, 2011, 4 - 4, Japanese


• A-1-3 A Temperature Characteristics Improvement of Ultra-low Power CMOS Bandgap Voltage Reference Circuit

  Kitamura Junya, Hirose Tetsuya, Osaki Yuji, Kuroki Nobutaka, Numa Masahiro

  The Institute of Electronics, Information and Communication Engineers, 28 Feb. 2011, Proceedings of the IEICE General Conference, 2011, 3 - 3, Japanese


• A-1-1 A Power Conversion Interface Circuit Using Thermoelectric Generator

  Saito Yusuke, Hirose Tetsuya, Osaki Yuji, Kuroki Nobutaka, Numa Masahiro

  The Institute of Electronics, Information and Communication Engineers, 28 Feb. 2011, Proceedings of the IEICE General Conference, 2011, 1 - 1, Japanese


• A-1-2 Analysis of On-Chip Power Supply Circuit Suitable for Subthreshold LSIs

  Nakamura Daigo, Hirose Tetsuya, Osaki Yuji, Kuroki Nobutaka, Numa Masahiro

  The Institute of Electronics, Information and Communication Engineers, 28 Feb. 2011, Proceedings of the IEICE General Conference, 2011, 2 - 2, Japanese


• C-12-63 Variation Compensation for Precise Nano-Ampere Current Reference

  Isono Kosuke, Hirose Tetsuya, Osaki Yuji, Kuroki Nobutaka, Numa Masahiro

  The Institute of Electronics, Information and Communication Engineers, 28 Feb. 2011, Proceedings of the IEICE General Conference, 2011(2) (2), 135 - 135, Japanese


• C-12-34 A CMOS Temperature Sensor for Ultra Low-power LSIs

  Nagayama Toshi, Hirose Tetsuya, Osaki Yuji, Kuroki Nobutaka, Numa Masahiro

  The Institute of Electronics, Information and Communication Engineers, 2011, Proceedings of the IEICE General Conference, 2, 106 - 106, Japanese


• C-12-24 Write-Assist Technique with On-Chip Threshold Voltage Monitoring Circuit for Subthreshold SRAM

  Matsumoto Kei, Hirose Tetsuya, Osaki Yuji, Kuroki Nobutaka, Numa Masahiro

  The Institute of Electronics, Information and Communication Engineers, 31 Aug. 2010, Proceedings of the Society Conference of IEICE, 2010(2) (2), 85 - 85, Japanese


• C-12-19 Complementary Switched Capacitor DC-DC Power Converter with TFF Circuits

  Tsujikawa Takuya, Hirose Tetsuya, Osaki Yuji, Kuroki Nobutaka, Numa Masahiro

  The Institute of Electronics, Information and Communication Engineers, 31 Aug. 2010, Proceedings of the Society Conference of IEICE, 2010(2) (2), 80 - 80, Japanese


• I-068 Dissolve Detection based on Time Variation of Local Histogram

  Maeda Satoshi, Tanaka Takashi, Kuroki Nobutaka, Hirose Tetsuya, Numa Masahiro

  Forum on Information Technology, 20 Aug. 2010, 情報科学技術フォーラム講演論文集, 9(3) (3), 435 - 436, Japanese


• I-026 Learning-based Super-resolution using principal component analysis of wavelet coefficients

  Nakaya Tomohiro, Chikamatsu Shingo, Kuroki Nobutaka, Hirose Tetsuya, Numa Masahiro

  Forum on Information Technology, 20 Aug. 2010, 情報科学技術フォーラム講演論文集, 9(3) (3), 299 - 300, Japanese


• C-12-40 Subthreshold SRAM Cell with Source-Coupled Logic Circuit

  Matsumoto Kei, Hirose Tetsuya, Osaki Yuji, Kuroki Nobutaka, Numa Masahiro

  The Institute of Electronics, Information and Communication Engineers, 02 Mar. 2010, Proceedings of the IEICE General Conference, 2010(2) (2), 117 - 117, Japanese


• C-12-44 Ultra-Low Current Comparator with Adaptive Biasing Techniques

  Tsubaki Keishi, Hirose Tetsuya, Osaki Yuji, Kuroki Nobutaka, Numa Masahiro

  The Institute of Electronics, Information and Communication Engineers, 02 Mar. 2010, Proceedings of the IEICE General Conference, 2010(2) (2), 121 - 121, Japanese


• C-12-20 A PVT Variation Tolerant Clock Reference Circuit

  Isono Kosuke, Hirose Tetsuya, Osaki Yuji, Matsumoto Kei, Kuroki Nobutaka, Numa Masahiro

  The Institute of Electronics, Information and Communication Engineers, 02 Mar. 2010, Proceedings of the IEICE General Conference, 2010(2) (2), 97 - 97, Japanese


• C-12-63 Delay Variation Compensation Architecture for Subthreshold CMOS Digital Circuits

  Osaki Yuji, Hirose Tetsuya, Matsumoto Kei, Kuroki Nobutaka, Numa Masahiro

  The Institute of Electronics, Information and Communication Engineers, 02 Mar. 2010, Proceedings of the IEICE General Conference, 2010(2) (2), 140 - 140, Japanese


• C-12-64 Switched Capacitor DC-DC Power Converter with Duty Control Circuits

  Tsujikawa Takuya, Hirose Tetsuya, Osaki Yuji, Kuroki Nobutaka, Numa Masahiro

  The Institute of Electronics, Information and Communication Engineers, 02 Mar. 2010, Proceedings of the IEICE General Conference, 2010(2) (2), 141 - 141, Japanese


• C-12-65 Linear Regulator Circuit for Low-Voltage Subthreshold CMOS LSIs

  Nagayama Toshi, Hirose Tetsuya, Osaki Yuji, Kuroki Nobutaka, Numa Masahiro

  The Institute of Electronics, Information and Communication Engineers, 02 Mar. 2010, Proceedings of the IEICE General Conference, 2010(2) (2), 142 - 142, Japanese


• An Error Diagnosis Technique Based on Error Locations Extracted from Subcircuit Using Circuit Structure

  SHIOKI Kosuke, WATANABE Kosuke, OKADA Narumi, ISHIHARA Toshiro, HIROSE Tetsuya, KUROKI Nobutaka, NUMA Masahiro

  本稿では，回路構造を考慮した修正箇所抽出に基づく論理診断手法を提案する．従来の論理診断手法 EXLLS 法では，処理時間の増加により，5 箇所以上の誤りを同時に修正することができなかった．また，各不一致外部出力を頂点とする部分回路に対する論理診断処理によって，修正箇所を抽出するため，回路全体の修正には不要な箇所を抽出する可能性があった．提案手法では，回路構造を考慮して分割した部分回路から修正箇所候補を抽出する．具体的には，部分回路に対する修正箇所候補集合の生成処理の際に，1) クラスタ単位での組合せ箇所の絞込み処理と，2) 複数の不一致外部出力をまとめた部分回路に対する論理診断処理，を行う．これにより処理時間を短縮し，一度に 6 箇所の設計誤りまでの修正を可能とする．また回路全体の修正には不要な箇所の抽出を抑えることが可能となる．実験結果より，従来手法では修正不可能な回路例のうち，84.4% の回路で修正解が得られるとともに処理時間は最大 1/14 に削減され，提案手法の有効性が確認された．In this paper, we present an error diagnosis technique based on error location extracted from subcircuit using circuit structure. Conventional error diagnosis technique, called EXLLS, cannot rectify five or more errors in a subcircuit at the same time due to increase of processing time. Furthermore, this method can extract useless locations for rectifing the whole circuit due to diagnosis for each error subcicuit. Our technique extracts error locations from subcircut considering circuit structure. Concretely, we propose the two methods in the process of extracting error locations, i) screening error location sets using cluster of elements and ii) extracting error locations for multiple subcircuit which has two or more incorrect primary outputs. Thereby, this method shortens the processing time and can rectify six errors at the same time. Moreover, we can reduce the possibility of extracting locations which are not needed to rectify the whole circuit. Experimental results have shown that the proposed technique rectifies 84.4% circuits which cannot be corrected by conventional one. Furthermore, the processing time has been shortened by 1/14 in the best case.

  情報処理学会, 25 Nov. 2009, 研究報告システムLSI設計技術（SLDM）, 2009(33) (33), 1 - 6, Japanese


• A 4-2 Compressor Using Hybrid-CMOS Logic Style to Reduce Glitches in Low-Power Multiplies

  KOGURE Takeshi, FUJIOKA Tatsuya, SHIZUKU Yuzuru, HIROSE Tetsuya, KUROKI Nobutaka, NUMA Masahiro

  本稿では，ハイブリッド型 CMOS 論理構成 4-2 加算器によって，乗算器のグリッチを削減する手法を提案する．従来のグリッチ削減手法では，信号の同期を図る付加回路による面積・消費電力の増加が問題であった．提案する加算器は，多段接続によりオン抵抗が高くなるパス・トランジスタ論理／トランスミッション・ゲートを利用して，付加回路を必要とせずにグリッチを削減する．また，駆動力の高い CMOS 論理を組み合わせ，動作速度の低下を抑制する．シミュレーションの結果，グリッチの動作率を 1/12 に削減できることを確認した．In this paper, we propose a technique to reduce glitches in a multiplier. Conventional techniques using flip-flops for synchronization increase area and power. Our 4-2 compressor using hybrid-CMOS logic style reduces glitches without additional circuits by using pass-transistor logic and transmission-gate which act like a high resistance when they are cascaded. In addition, CMOS inverter reduces speed deterioration. Evaluation results by simulation have shown that the proposed technique reduces glitch activity by 1/12.

  情報処理学会, 25 Nov. 2009, 研究報告システムLSI設計技術（SLDM）, 2009(20) (20), 1 - 6, Japanese


• A-1-40 Current reference circuit by using temperature characteristics of carrier mobility

  Kito Toyoaki, Hirose Tetsuya, Osaki Yuji, Kuroki Nobutaka, Numa Masahiro

  The Institute of Electronics, Information and Communication Engineers, 04 Mar. 2009, Proceedings of the IEICE General Conference, 2009, 40 - 40, Japanese


• A-1-42 Process Compensation for Subthreshold Digital Circuits by using Voltage Scaling Techniques

  Osaki Yuji, Hirose Tetsuya, Matsumoto Kei, Kuroki Nobutaka, Numa Masahiro

  The Institute of Electronics, Information and Communication Engineers, 04 Mar. 2009, Proceedings of the IEICE General Conference, 2009, 42 - 42, Japanese


• A-1-38 A Reverse Current Protection Circuit for On-Chip DC-DC Converter

  Tsujikawa Takuya, Hirose Tetsuya, Osaki Yuji, Kuroki Nobutaka, Numa Masahiro

  The Institute of Electronics, Information and Communication Engineers, 04 Mar. 2009, Proceedings of the IEICE General Conference, 2009, 38 - 38, Japanese


• A-1-41 A Voltage Reference Circuit based on Threshold Voltage Difference

  Matsumoto Kei, Hirose Tetsuya, Osaki Yuji, Kuroki Nobutaka, Numa Masahiro

  The Institute of Electronics, Information and Communication Engineers, 04 Mar. 2009, Proceedings of the IEICE General Conference, 2009, 41 - 41, Japanese


• A-1-39 Switched Capacitor DC-DC Power Converter for Subthreshold CMOS LSIs

  Ishii Sho, Hirose Tetsuya, Osaki Yuji, Kuroki Nobutaka, Numa Masahiro

  The Institute of Electronics, Information and Communication Engineers, 04 Mar. 2009, Proceedings of the IEICE General Conference, 2009, 39 - 39, Japanese


• I-026 A Super-Resolution Method for Infrared Thermography

  Kouda Masakazu, Kuroki Nobutaka, Numa Masahiro

  Forum on Information Technology, 20 Aug. 2008, 情報科学技術フォーラム講演論文集, 7(3) (3), 251 - 252, Japanese


• I-091 A Speed-up Method for Total Variation-Based Image Denoising

  Otani Hirofumi, Hirata Kengo, Kuroki Nobutaka, Numa Masahiro

  Forum on Information Technology, 20 Aug. 2008, 情報科学技術フォーラム講演論文集, 7(3) (3), 395 - 396, Japanese


• P-34 Introductory Education in Department of Electrical and Electronic Engineering at Kobe University

  FUJII Minoru, KUROKI Nobutaka

  Japanese Society for Engineering Education, 31 Jul. 2008, 工学・工業教育研究講演会講演論文集, 20, 742 - 743, Japanese


• H-018 An Automatic Video Digesting Technique for Broadcasted Baseball Games

  Ogata Yoshitaka, Nakamura Daisuke, Kataoka Mitsuteru, Kuroki Nobutaka, Numa Masahiro

  Forum on Information Technology, 2008, FIT2008, Sep., 99 - 100, Japanese


• I-040 Automatic Calibration of In-Vehicle Camera Attached to Rearview Mirror and Estimation of Driver's Head Position

  Inoi Kosaku, Kuroki Nobutaka, Numa Masahiro

  Forum on Information Technology, 22 Aug. 2007, 情報科学技術フォーラム一般講演論文集, 6(3) (3), 287 - 288, Japanese


• H-076 Topic Segmentation in News Programs Based on Closed Captions

  Hinoue Naoki, Kataoka Mitsuteru, Kuroki Nobutaka, Numa Masahiro, Yamamoto Keisuke

  Forum on Information Technology, 22 Aug. 2007, 情報科学技術フォーラム一般講演論文集, 6(3) (3), 181 - 182, Japanese


• H-077 Baseball Video Indexing Based on Closed Captions

  Nakamura Daisuke, Yamanaka Takahiro, Kataoka Mitsuteru, Kuroki Nobutaka, Numa Masahiro, Yamamoto Keisuke

  Forum on Information Technology, 22 Aug. 2007, 情報科学技術フォーラム一般講演論文集, 6(3) (3), 183 - 184, Japanese


• ICI Cancellation Method with Reduced Computational Cost for Mobile Reception of OFDM Signals

  SATO Shinya, HORIUCHI Shunsuke, YAMAMOTO Akinori, KAWASHIMA Kazumi, KUROKI Nobutaka, NUMA Masahiro

  Orthogonal frequency division multiplexing (OFDM) modulation is used for Japanese terrestrial digital broadcasting. High speed mobile reception of OFDM signals is seriously hampered by inter-carrier interference (ICI) due to the Doppler shift. In this paper, we propose a method to improve performance of mobile reception by subtracting ICI from OFDM signals. By using a simplified model of the transmission characteristic, we can reduce the computational cost. The simulation results assuming a typical urban area shows improvement of hte maximum moving speed from about 175km/h to about 247km/h when RF Frequency is 800 MHz.

  The Institute of Electronics, Information and Communication Engineers, 31 Jul. 2007, IEICE technical report, 107(183) (183), 19 - 23, Japanese


• K_040 A Presentation Support System with Infrared Beam Pointer and Image Processing

  Ninomiya Ken-ichi, Kuroki Nobutaka, Yokoyama Takayuki, Nume Masahiro

  Forum on Information Technology, 21 Aug. 2006, 情報科学技術フォーラム一般講演論文集, 5(3) (3), 469 - 470, Japanese


• H_026 Triple Density Error Diffusion for Medical Monochrome LCDs and Improvement of Diffusion Coefficients

  Nakaide Yushi, Kuroki Nobutaka, Oka Nobuhiro, Numa Masahiro

  Forum on Information Technology, 21 Aug. 2006, 情報科学技術フォーラム一般講演論文集, 5(2) (2), 445 - 446, Japanese


• J_047 An Adaptive Error Diffusion Mehtod for High Gradation Display Based on Human Visual Sensitivity

  Yamamoto Kazuhide, Kuroki Nobutaka, Numa Masahiro

  Forum on Information Technology, 21 Aug. 2006, 情報科学技術フォーラム一般講演論文集, 5(3) (3), 295 - 296, Japanese


• Driver's Head Tracking Technique with Near-Infrared Pulse Lighting and Stereo Camera

  KONISHI Shinpei, KUROKI Nobutaka, YAMANE Tomoyuki, NUMA Masahiro, YAMAMOTO Keisuke

  In recent years, image processing technologies to support safe driving are extensively studied. Driver's head tracking is important for such applications as doze monitor, automatic adjustment of headrest, and driver's face recognition. However, it is very difficult to trace the driver's head position due to noisy light condition inside the car. For robust head tracking under such condition, we propose a technique to divide the driver's image from background with a near-infrared pulse lighting. Experimental results for driving in the night, the proposed technique can trace a driver's head position with a mean detection error of 3.78cm.

  Information Processing Society of Japan (IPSJ), 05 Sep. 2005, 情報処理学会研究報告高度交通システム（ITS）, 2005(89) (89), 19 - 23, Japanese


• Driver's Head Tracking Technique with Near-Infrared Pulse Lighting and Stereo Camera

  KONISHI Shinpei, KUROKI Nobutaka, YAMANE Tomoyuki, NUMA Masahiro, YAMAMOTO Keisuke

  In recent years, image processing technologies to support safe driving are extensively studied. Driver's head tracking is important for such applications as doze monitor, automatic adjustment of headrest, and driver's face recognition. However, it is very difficult to trace the driver's head position due to noisy light condition inside the car. For robust head tracking under such condition, we propose a technique to divide the driver's image from background with a near-infrared pulse lighting. Experimental results for driving in the night, the proposed technique can trace a driver's head position with a mean detection error of 3.78cm.

  The Institute of Electronics, Information and Communication Engineers, 05 Sep. 2005, 電子情報通信学会技術研究報告, 105(259) (259), 19 - 23, Japanese


• Predictive Coding of Palletized Images Based on Nearness Ordering

  KUROKI NOBUTAKA, NUMA MASAHIRO, YAMAMOTO KEISUKE

  This paper presents a predictive coding technique for palletized images based on nearness ordering. Pixels in palletized images such as GIF formatted images with 256 colors are usually represented by index numbers in a color palette. To such images, it is impossible to get high efficient compression by using Lossless JPEG or CALIC because (1) the predictor does not work well for index numbers and (2) prediction errors depend on the order of colors in the palette. We propose a predictive coding with the idea of nearness ordering to overcome these problems. A nearness rank is a value assigned to each color based on the distance from the predicted color in 3-D color space. Our entropy coder encodes not prediction errors between predicted colors and original colors, but the nearness ranks assigned to these original colors. Experimental results of high compression ratios for palletized images, such as logos or dithering pictures, have shown the effectiveness of the proposed technique.

  Information Processing Society of Japan (IPSJ), 15 Oct. 2002, Transactions of Information Processing Society of Japan, 43(10) (10), 3191 - 3198, Japanese


• Fourier Transform for Analyzing Light Emission Pattern on Digital Display

  Kuroki Nobutaka, Kawanishi Ryoichi, Numa Masahiro, Yamamoto Keisuke

  The Institute of Electronics, Information and Communication Engineers, 20 Aug. 2002, Proceedings of the Society Conference of IEICE, 2002(2) (2), 40 - 40, Japanese


• An Evaluation Technique for Subfield Method on Digital Display

  Kawanishi Ryouichi, Kuroki Nobutaka, Numa Masahiro, Yamamoto Keisuke

  The Institute of Electronics, Information and Communication Engineers, 20 Aug. 2002, Proceedings of the Society Conference of IEICE, 2002(2) (2), 41 - 41, Japanese


• An Evaluation Technique for Error Diffusion on Digital Display

  Komori Juro, Kuroki Nobutaka, Numa Masahiro, Yamamoto Keisuke

  The Institute of Electronics, Information and Communication Engineers, 20 Aug. 2002, Proceedings of the Society Conference of IEICE, 2002(2) (2), 42 - 42, Japanese


• Sub - Band Video Coding with Motion Compensation and Its Hardware Implementation

  KAIMI Toshiyuki, UMABA Takayuki, KOBAYASHI Naka, KUROKI Nobutaka, NUMA Masahiro, YAMAMOTO Keisuke

  We propose a novel sub-band video coding technique based on wavelet transform with motion compensation employing prediction of motion vectors for the higher sub-bands based on those in the lowest sub-band. Correlation between motion vectors for sub-bands is successfully used to shorten the processing time as well as the total code length. Experimental results using software implementation have shown 25% shorter processing time than the conventional full search method. Furthermore, we have implemented the video encoder including the proposed technique, called DVC-W (Digital Video Codec based on Wavelet transform), by hardware using FPGA's and memories. The clock frequency needed for real-time processing has been reduced to 78% by the proposed technique.

  Information Processing Society of Japan (IPSJ), 23 May 2002, 情報処理学会研究報告システムLSI設計技術（SLDM）, 2002(46) (46), 79 - 84, Japanese


• Sub-Band Video Coding with Motion Compensation and Its Hardware Implementation

  KAIMI Toshiyuki, UMABA Takayuki, KOBAYASHI Naka, KUROKI Nobutaka, NUMA Masahiro, YAMAMOTO Keisuke

  We propose a novel sub-band video coding technique based on wavelet transform with motion compensation employing prediction of motion vectors for the higher sub-bands based on those in the lowest sub-band. Correlation between motion vectors for sub-bands is successfully used to shorten the processing time as well as the total code length. Experimental results using software implementation have shown 25% shorter processing time than the conventional full search method. Furthermore, we have implemented the video encoder including the proposed technique, called DVC-W (Digital Video Codec based on Wavelet transform), by hardware using FPGA's and memories. The clock frequency needed for real-time processing has been reduced to 78% by the proposed technique.

  The Institute of Electronics, Information and Communication Engineers, 17 May 2002, Technical report of IEICE. VLD, 102(73) (73), 37 - 42, Japanese


• Synthesis and Layout of Circuits Combining CMOS/Pass Transistor Logic

  TAKATA Kengo, FUKUOKA Kazuki, FUJITA Katsuya, FUKUTOMI Hironobu, KUROKI Nobutaka, NUMA Masahiro, TAKI Kazuo, YAMAMOTO Keisuke

  We present an improved synthesis method for low power circuits combining CMOS and pass transistor logic (PTL) based on the previous method using decomposition graphs obtained as the result of simple disjunctive decomposition. The proposed method introduces a few techniques for sharing larger part of sub-circuits in a multi-output circuit. In addition, we have developed a standard cell library to evaluate our method based on the layout results using commercial layout tools. This cell library have been applied to the layout design of benchmark circuits, and we have evaluated the results. As the result, power dissipation has been reduced by 48% compared to CMOS, and by 7% to PTL, and by 7% to the previous method in average for 16 circuits.

  Information Processing Society of Japan (IPSJ), 15 May 2002, Transactions of Information Processing Society of Japan, 43(5) (5), 1357 - 1360, Japanese


• An LUT-based Multiple Error Diagnosis Technique Using Symbolic Simulation with Truth Variables

  NUMA Masahiro, INOUE Hiroshi, KAIMI Toshiyuki, KUROKI Nobutaka, YAMAMOTO Keisuke

  Rectification of four or more design errors in LUT-based circuits based on the EXL-algorithm has been difficult due to processing time. For breaking through this problem, we present an error diagnosis technique: EXL_ employing TV simulation, a novel symbolic simulation method using truth variables to represent LUT contents. Based on the simulation result, EXL_ reduces the number of error location sets efficiently. In addition, the result is also used to reduce the number of BDD nodes needed for rectification of LUT contens. The experimental results for LUT-based circuits including 3 design errors demonstrate that TV simulation has reduced the number of combinations of LUT's to be rectified to 3.1% of conventional one. The number of BDD nodes needed for rectification is also reduced to 23% by replacing truth variables by Boolean constants or other ones based on the results of TV simulation. EXL_ has shortened the processing times for rectification of 3 design errors to about one-seventh of EXL. Moreover, EXL_ has performed rectification of four design errors within paractical processing time.

  Information Processing Society of Japan (IPSJ), 15 May 2002, Transactions of Information Processing Society of Japan, 43(5) (5), 1252 - 1259, Japanese


• An Error Diagnosis Technique for LUT-Based FPGA Designs Combining Pattern-Based Technique and BDD-Based Formal Technique

  NUMA Masahiro, INOUE Hiroshi, KUROKI Nobutaka, YAMAMOTO Keisuke

  本論文では, LUT型FPGAで実現された組合せ回路に含まれる多重設計誤りの修正を行うEXL法を提案する.本手法では, 誤り追跡入力と呼ばれるパターンに基づく処理と, BDDに基づく論理関数処理を組み合わせている.パターンに基づく処理では, 従来のゲート回路を対象とする拡張X-伝搬法と同様に, 考慮すべき組合せ箇所数を大幅に削減することを目的とする.一方, 論理関数処理においては, 残存する各組合せ箇所について, LUT内部の機能を正しく決定することを目的とする.これら2種類の手法を併用することにより, 現実的な処理時間で、100%の限定率が達成された.

  The Institute of Electronics, Information and Communication Engineers, 01 Oct. 2001, The Transactions of the Institute of Electronics,Information and Communication Engineers., 84(10) (10), 1474 - 1483, Japanese


• Synthesis of Low Power Circuits Combining CMOS/Pass Transistor Logic

  TAKATA Kengo, JINNO Chikateru, KUROKI Nobutaka, NUMA Masahiro, TAKI Kazuo, YAMAMOTO Keisuke

  Logic functions can be implemented with fewer transistors based on the pass transistor logic (PTL) than on the static CMOS logic in many cases, but not always. For simple functions such as (N) OR and (N) AND, static CMOS logic circuits can often be implemented with fewer transistors than PTL. In order to reduce transistor counts for lower power dissipation, we propose a method to synthesize logic circuits combining CMOS and PTL based on the decomposition graph obtained as the result of simple disjunctive decomposition for a given logic function. Based on the decomposition graph, we implement simple functions with CMOS logic. On the other hand, we implement the other functions with PTL based on sliced BDD (Binary Decision Diagram) to reduce buffer counts. On a set of 40 MCNC benchmarks,our method has synthesized circuits with lower power dissipation by 27% than area-oriented CMOS, and by 12% than SPL.

  Information Processing Society of Japan (IPSJ), 15 Apr. 2001, Transactions of Information Processing Society of Japan, 42(4) (4), 967 - 974, Japanese


• A High-Level Synthesis System for Reconfigurable Machine : RM-V

  MUROYA Tomokazu, HASHIMOTO Koji, TAKABAYASHI Hirotada, KUROKI Nobutaka, NUMA Masahiro

  電気学会, 01 Nov. 2000, The Transactions of the Institute of Electrical Engineers of Japan. C, 120(11) (11), 1637 - 1643, Japanese


• Fast Dithering Technique for MPEG Viewer with A 256-Color Mode

  KUROKI Nobutaka, NUMA Masahiro

  電気学会, 01 Nov. 2000, The Transactions of the Institute of Electrical Engineers of Japan. C, 120(11) (11), 1622 - 1628, Japanese


• Reconfigurable Machine:RM-V and Its Applications

  YAMAGUCHI Takuya, ANZAI Shinsuke, MIZUTANI Atsushi, KUROKI Nobutaka, NUMA Masahiro

  電気学会, 01 Nov. 2000, The Transactions of the Institute of Electrical Engineers of Japan. C, 120(11) (11), 1629 - 1636, Japanese


• A High - Level Synthesis System for Reconfigurable Machine : RM - V

  MUROYA Tomokazu, HASHIMOTO Koji, TAKABAYASHI Hirotada, KUROKI Nobutaka, NUMA Masahiro

  This paper presents a high-levelsynthesis system, called RMAC-V (Reconfigurable Machine Application Compiler for RM-V), for applications using SDRAMs implemented on the flexible architecture of RM-V(Reconfigurable Machine-V)combining FPGAs and memories.Given an application program written in the C language, RMAC-V produces an RT-level hardware description in VHDL. To reduce the clock counts needed to access memories, RMAC-V introduces two techniques: multi-clock scheduling and preloading row address. Experimental results on Wavelet Transform Engine (WTE) have shown 33 % fewer total clock counts than those with conventional method.

  Information Processing Society of Japan (IPSJ), 11 May 2000, 情報処理学会研究報告システムLSI設計技術（SLDM）, 2000(37) (37), 41 - 47, Japanese


• An Error Diagnosis Technique for LUT - Based FPGA Designs Combining Pattern - Based Technique and BDD - Based Formal Technique

  INOUE Hiroshi, KAIMI Toshiyuki, MIZUTANI Koji, KUROKI Nobutaka, NUMA Masahiro

  This paper presents an approach to rectify multiple logic design errors in LUT-based FPGA designs. This approach, called EXL-algorithm, combines two kinds of techniques:a pattern-based technique for locating errors like in the EXM-algorithm, and a BDD-based formal technique to fix LUT function at each location. This combination allows the EXL-algorithm to recitfy errors of LUT functions within practical processing time at 100 % hit ratio.

  Information Processing Society of Japan (IPSJ), 11 May 2000, 情報処理学会研究報告システムLSI設計技術（SLDM）, 2000(37) (37), 49 - 56, Japanese


• Reconfigurable Machine : RM - V and Its Applications

  YAMAGUCHI Takuya, ANZAI Shinsuke, MIZUTANI Atsushi, KUROKI Nobutaka, NUMA Masahiro

  This paper presents Reconfigurable Machine:RM-V developed to accelerate a wide range of applications on the flexibie hardware architecture combining FPGAs and memories.RM-V consists of larger scale FPGAs, SRAMs, and SDRAMs offering×6.8 gete capacity and×170 memory capacity compared to the former prototype:RM-IV.RM-V offers higher flexibility and scality by using application specific base-board on which one to four mobule-boards are mountsd.Experimental results with image processing applications have shown that RM-V works at about×10 to ×30processing speed compared to software processing.

  Information Processing Society of Japan (IPSJ), 11 May 2000, 情報処理学会研究報告システムLSI設計技術（SLDM）, 2000(37) (37), 33 - 39, Japanese


• Reconfigurable Machine : RM-V and Its Applications

  YAMAGUCHI Takuya, ANZAI Shinsuke, MIZUTANI Atsushi, KUROKI Nobutaka, NUMA Masahiro

  This paper presents Reconfigurable Machine:RM-V developed to accelerate a wide range of applications on the flexible hardware architecture combining FPGAs and memories. RM-V consists of larger scale FPGAs, SRAMs, and SDRAMs offering ×6.8 gate capacity and ×170 memory capacity compared to the former prototype:RM-IV. RM-V offers higher flexibility and scalability by using application specific base-board on which one to four module-boards are mounted. Experimental results with image processing applications have shown that RM-V works at about ×10 to ×30 processing speed compared to software processing.

  The Institute of Electronics, Information and Communication Engineers, 05 May 2000, Technical report of IEICE. VLD, 100(36) (36), 9 - 15, Japanese


• An Error Diagnosis Technique for LUT-Based FPGA Designs Combining Pattern-Based Technique and BDD-Based Formal Technique

  INOUE Hiroshi, KAIMI Toshiyuki, MIZUTANI Koji, KUROKI Nobutaka, NUMA Masahiro

  This paper presents an approach to rectify multiple logic design errors in LUT-based FPGA designs. This approach, called EXL-algorithm, combines two kinds of techniques:a pattern-based technique for locating errors like in the EXM-algorithm, and a BDD-based formal technique to fix LUT function at each location. This combination allows the EXL-algorithm to rectify errors of LUT functions within practical processing time at 100 % hit ratio.

  The Institute of Electronics, Information and Communication Engineers, 05 May 2000, Technical report of IEICE. VLD, 100(36) (36), 25 - 32, Japanese


• A High-Level Synthesis System for Reconfigurable Machine : RM-V

  MUROYA Tomokazu, HASHIMOTO Koji, TAKABAYASHI Hirotada, KUROKI Nobutaka, NUMA Masahiro

  This paper presents a high-level synthesis system, called RMAC-V(Reconfigurable Machine Application Compiler for RM-V), for applications using SDRAMs implemented on the flexible architecture of RM-V(Reconfigurable Machine-V)combining FPGAs and memories. Given an application program written in the C language, RMAC-V produces an RT-level hardware description in VHDL. To reduce the clock counts needed to access memories, RMAC-V introduces two techniques:multi-clock scheduling and preloading row address. Experimental results on Wavelet Transform Engine(WTE)have shown 33 % fewer total clock counts than those with conventional method.

  The Institute of Electronics, Information and Communication Engineers, 05 May 2000, Technical report of IEICE. VLD, 100(36) (36), 17 - 23, Japanese


• A Logic Diagnosis Technique Improved in the Number of Rectifiable Logic Design Errors

  INOUE Hiroshi, MASUDA Kohei, KUROKI Nobutaka, NUMA Masahiro

  Rectification of four or more design errors in a combinational circuit based on the EXM-algorithm, an existing algorithm for logic diagnosis, has been difficult due to processing time. This paper presents a logic diagnosis technique applicable to four or more design errors employing iterative diagnosis procedure for subcircuits extracted based on the correctness of primary output functions. By handling the subcircuits, the proposed algorithm reduces both the number of gates and the number of logic design errors to be considered at once for logic diagnosis. Experimental results demonstrate that most of circuits including four or more design errors can be rectified within shorter processing time.

  Information Processing Society of Japan (IPSJ), 15 Apr. 2000, Transactions of Information Processing Society of Japan, 41(4) (4), 970 - 973, Japanese


• Three-Dimensional Prediction for Lossless Coding of Digital RGB Image

  Kuroki Nobutaka, Nomura Takanori Kameda Masashi, Numa Masahiro, Hirano Kotaro

  Kobe University, Nov. 1999, Memoirs of the Faculty of Engineering, Kobe University, 46, 69 - 79, English


• Layered Blind Deconvolution with Interband Prediction

  MASUDA Hirokazu, KUROKI Nobutaka, NUMA Masahiro, HIRANO Kotaro

  画像復元問題の一解法として, 帯域間予測を用いた階層的ブラインドデコンボリューションを提案する.従来の階層的ブラインドデコンボリューションでは, 帯域分割後の高域成分の復元が困難であった.そこで本論文では, 低域成分の復元結果から帯域間予測を用いて高域成分を予測し, これらの合成結果を次の階層の初期画像とすることで復元画像の品質向上を図る手法を提案する.提案手法および従来手法による復元能力の比較実験の結果, 帯域間予測の有効性を確認した.

  The Institute of Electronics, Information and Communication Engineers, Dec. 1998, The Transactions of the Institute of Electronics,Information and Communication Engineers., 81(12) (12), 2712 - 2717, Japanese


• A Reconfigurable Machine : RM-III and Its Applications

  Numa Masahiro, Kuroki Nobutaka, Hirano Kotaro

  Kobe University, 23 Jan. 1998, Memoirs of the Faculty of Engineering, Kobe University, 44, 77 - 85, English


• Image Coding Based on Subband DCT

  井田 智永, 柳野 智, 黒木 修隆, 沼 昌宏, 平野 浩太郎, Mitra Sanjit K.

  DCTによる画像符号化手法の問題点として、演算量の多さやブロック歪みの発生が挙げられる。これらの問題点を解決するために、DCTの高速アルゴリズムやサブバンド分割手法が提案されてきたが、それらの研究は個別に行われてきた。しかしDCTの高速アルゴリズムは実はサブバンド分割と密接な関係がある。本稿では両者の関係について述べた後、サブバンドDCTを用いた符号化手法を提案するJPEG方式との比較の結果,低ビットレートの符号化の際に良好な結果を得たので報告する。

  04 Sep. 1996, 全国大会講演論文集, 53, 351 - 352, Japanese


• A supporting system for education/research through computer communication

  HIRANO Kotaro, NUMA Masahiro, KUROKI Nobutaka, NAGAI Takehiko

  An supporting system for education/research through computer communication is developed. This system provides a client-server database of academic information with multimedia feature on a personal computer. A client machine can access to the server through a computer network or a telephone line. Four types of information are include : "General introduction", "Education and research", "Social service" and "Communication salon". Users can access to those corners through a comfortable graphical interface. The experimental test confirms that even the beginner can use this system easily.

  The Institute of Electronics, Information and Communication Engineers, 22 Jul. 1995, IEICE technical report. Education technology, 95(176) (176), 91 - 96, Japanese


• Haar Wavelet Transform with Inter Band Prediction and Its Application to Image Coding

  KUROKI Nobutaka, NOMURA Takanori, KAMEDA Masashi, NUMA Masahiro, HIRANO Kotaro

  離散コサイン変換(DCT)やウェーブレット変換は画像信号の冗長抑圧に有効な手法として利用されているが,処理の複雑さやブロックひずみの発生が問題となっている.そこで本論文では,高速処理が可能であり,符号化に適し,かつブロックひずみの少ない再生画像が得られる帯域分割手法として,帯域間予測を用いたハール・ウェーブレット変換を提案する.本変換手法で用いる帯域間予測とは,帯域を2分割するたびに低域信号のこう配から高域信号を予測し,それをよりエントロピーの低い補正信号に変換する処理である.逆変換の際は正変換の際と同じ予測係数を用いて高域信号を予測し,これに補正信号を加算することによってもとの高域信号を再構成する.この予測処理ではアップサンプリングされた低域信号を滑らかに補間するような高域信号を生成するため,再生画像にブロックひずみが現れにくくなる.本論文では提案する帯域間予測処理をSSKFバンクを用いたサブバンド分割の考え方に基づいて詳しく解析した後に,本変換手法を用いた実画像データの帯域分割と符号化,プログレッシブビルドアップによる再生の実験を行い,本変換手法が画像データの符号化に有効であることを示す.

  The Institute of Electronics, Information and Communication Engineers, 01 Dec. 1994, The Transactions of the Institute of Electronics,Information and Communication Engineers. A, 77(12) (12), 1738 - 1746, Japanese


• Reconfigurable Machine and Its Application to Rectification of Logic Design Errors

  NUMA MASAHIRO, SUGANUMA NAOAKI, KUROKI NOBUTAKA, HIRANO KOTARO

  This paper presents a Reconfigurable Machine (RM), capable of efficiently implementing a wide range of computationally complex algorithms. Its highly flexible architecture combining re-programmable FPGA's with RAM's supports a wide range of applications. Since its "gate-level programmability" allows us to implement various kinds of parallel processing techniques, RM provides a performance comparable to existing "special-purpose" engines for LSI CAD. The dynamic recongifuration capability of FPGA's is used to reload several kinds of configuration data while power is applied to them. Thus, RM behaves itself like a general-purpose computer applicable to various kinds of applications by loading programs. A Reconfigurable Machine prototype, called RM-I, has been built as the first prototype incorporating five FPGA's and four SRAM memory banks. RM-I has been applied to logic diagnosis, which locates logic design errors in gate-level combinational circuits. Two kinds of locating processes have been implemented on a Logic Diagnosis Engine (LDE) employing RM-I as a hardware platform. LDE has achieved the processing speeds 35 to 50 times as fast as that on a 15 MIPS computer. The concept of RM is one of the best solution to the trade-offs between general-purpose machines and special-purpose ones.

  Information Processing Society of Japan (IPSJ), 15 Nov. 1994, IPSJ Journal, 35(11) (11), 2488 - 2499, Japanese

• OHM大学テキスト 電気回路I

  KUROKI Nobutaka, INOUE Kazunari, ASAI Fumio, MORIWAKI Kazuyuki, TAKENO Hiromasa, HAGA Hiroshi

  Others, オーム社, Sep. 2012, Japanese

  Textbook

• リアルタイムクロックに向けた超低消費電力32 kHz水晶発振回路

  KIMURA Ryohei, ASANO Hiroki, MATSUMOTO Kaori, KUROKI Nobutaka, NUMA Masahiro, MAIDA Osamu, KANEMOTO Daisuke, HIROSE Tetsuya

  電子情報通信学会 ICD/CAS研究会 学生・若手研究会, Dec. 2019, Japanese

  Oral presentation


• 低電圧エネルギーハーベスティングシステムに向けた超低消費電力電圧モニタ回路

  YAGURA Yoshiki, SATO Takanori, MATSUMOTO Kaori, KUROKI Nobutaka, NUMA Masahiro, MAIDA Osamu, KANEMOTO Daisuke, HIROSE Tetsuya

  電子情報通信学会 ICD/CAS研究会 学生・若手研究会, Dec. 2019, Japanese

  Oral presentation


• ワイヤレス給電システムの位置自由度を改善するパワーマネジメント回路に関する研究

  OKITA Syo, MASUDA Sota, MATSUMOTO Kaori, KUROKI Nobutaka, NUMA Masahiro, MAIDA Osamu, KANEMOTO Daisuke, HIROSE Tetsuya

  電子情報通信学会 ICD/CAS研究会 学生・若手研究会, Dec. 2019, Japanese

  Oral presentation


• 畳み込みニューラルネットワークを用いたアスファルトのひび割れ検出と画像の自動スケール判断

  HARAGUCHI Toshiki, KUROKI Nobutaka, HIROSE Tetsuya, NUMA Masahiro

  令和元年電気関係学会関西連合大会, Dec. 2019, Japanese

  Oral presentation


• VGGとU-Netを組み合わせたニューラルネットワークによるグレースケール画像の自動着色

  HARAGUCHI Toshiki, KUROKI Nobutaka, HIROSE Tetsuya, NUMA Masahiro

  第18回情報科学技術フォーラム, Sep. 2019, Japanese

  Oral presentation


• CNNを用いた近赤外線画像のセグメンテーションとカラリゼーション

  IWAMINE Haruya, MIURA Taiki, KUROKI Nobutaka, HIROSE Tetsuya, NUMA Masahiro

  第18回情報科学技術フォーラム, Sep. 2019, Japanese

  Oral presentation


• Skip-ConnectionとSeparable畳み込みを用いたCNNによる画像の単眼深度推定

  YOSHIDA Syoma, KUROKI Nobutaka, HIROSE Tetsuya, NUMA Masahiro

  第18回情報科学技術フォーラム, Sep. 2019, Japanese

  Oral presentation


• 分岐構造のCNNによる高速な多クラス分類システムに関する研究

  MURAOKA Yuta, KUROKI Nobutaka, HIROSE Tetsuya, NUMA Masahiro

  第18回情報科学技術フォーラム, Sep. 2019, Japanese

  Oral presentation


• CNNのハードウェア実装における全結合層のリソース削減手法に関する一検討

  KAWAI Yuki, FURUKAWA Takumi, KUROKI Nobutaka, HIROSE Tetsuya, NUMA Masahiro

  第18回情報科学技術フォーラム, Sep. 2019, Japanese

  Oral presentation


• 極低電圧エネルギーハーベスティングに向けたスイッチトキャパシタ型昇圧コンバータ

  NISHI Masaya, NAKAZAWA Yuichiro, MATSUMOTO Kaori, KUROKI Nobutaka, NUMA Masahiro, HIROSE Tetsuya

  第32回 回路とシステムワークショップ, Aug. 2019, Japanese

  Oral presentation


• 超低消費電力で動作するアクティブダイオードの設計

  MATSUMOTO Kaori, NAKAZAWA Yuichiro, KUROKI Nobutaka, NUMA Masahiro, HIROSE Tetsuya

  LSIとシステムのワークショップ2019, May 2019, Japanese

  Poster presentation


• 論理再合成における遅延時間抑制に有効なRECONスペアセルの概略配置手法

  SAWAI Takeshi, HIROSE Tetsuya, KUROKI Nobutaka, NUMA Masahiro

  第17回情報科学技術フォーラム, Sep. 2018, Japanese, 電子情報通信学会，情報処理学会, Domestic conference

  Oral presentation


• 誤り追跡入力の追加生成に基づく論理診断処理の効率化

  OMURA Shogo, TAKEZAKI Ayano, HIROSE Tetsuya, KUROKI Nobutaka, NUMA Masahiro

  第17回情報科学技術フォーラム, Sep. 2018, Japanese, 電子情報通信学会，情報処理学会, Domestic conference

  Oral presentation


• セグメンテーションを組み合わせたDCGANによる画像の自動生成

  URAZOE Kazuya, KUROKI Nobutaka, HIROSE Tetsuya, NUMA Masahiro

  第17回情報科学技術フォーラム, Sep. 2018, Japanese, 電子情報通信学会，情報処理学会, Domestic conference

  Oral presentation


• CNNハードウェアにおけるDRAMアクセス量削減手法

  FURUKAWA Takumi, MOCHIZUKI Kana, KURODA Kosaku, HIROSE Tetsuya, KUROKI Nobutaka, NUMA Masahiro

  第17回情報科学技術フォーラム, Sep. 2018, Japanese, 電子情報通信学会，情報処理学会, Domestic conference

  Oral presentation


• 4CH出力CNNを用いた超解像処理のハードウェア化

  SUZUKI Koyo, SAWAI Takeshi, HIROSE Tetsuya, KUROKI Nobutaka, NUMA Masahiro

  第17回情報科学技術フォーラム, Sep. 2018, Japanese, 電子情報通信学会，情報処理学会, Domestic conference

  Oral presentation


• 低電圧・微弱環境エネルギー利用に向けたパワーマネジメントシステム

  YAMATE Hiroki, HIROSE Tetsuya, ASANO Hiroki, NAKAZAWA Yuichiro, KANZAKI Shuto, KUROKI Nobutaka, NUMA Masahiro

  LSIとシステムのワークショップ2018, May 2018, Japanese, 電子情報通信学会集積回路研究専門委員会, Domestic conference

  Poster presentation


• 最大効率点追従制御を用いたスイッチトキャパシタ型降圧コンバータの高効率化

  KANZAKI Shuto, HIROSE Tetsuya, OZAKI Toshihiro, ASANO Hiroki, NAKAZAWA Yuichiro, KUROKI Nobutaka, NUMA Masahiro

  第31回 回路とシステムワークショップ, May 2018, Japanese, 電子情報通信学会, Domestic conference

  Oral presentation


• 過電流制御技術を用いた自己バイアス型シリーズレギュレータ

  LEE YOUNG GYUN, HIROSE Tetsuya, ASANO Hiroki, KANZAKI Shuto, KUROKI Nobutaka, NUMA Masahiro

  第31回 回路とシステムワークショップ, May 2018, Japanese, 電子情報通信学会, Domestic conference

  Oral presentation


• アクティブダイオードに向けたヒステリシスコンパレータの設計

  MATSUMOTO Kaori, HIROSE Tetsuya, ASANO Hiroki, TSUJI Yuto, NAKAZAWA Yuichiro, KUROKI Nobutaka, NUMA Masahiro

  第31回 回路とシステムワークショップ, May 2018, Japanese, 電子情報通信学会, Domestic conference

  Oral presentation


• A self-biased low-dropout linear regulator for ultra-low power battery management

  OZAKI Toshihiro, HIROSE Tetsuya, ASANO Hiroki, KUROKI Nobutaka, NUMA Masahiro

  IEEE EDS Kansai Chapter, The 17th Kansai Colloquium Electron Devices Workshop, Jan. 2018, Japanese, The Institute of Electrical and Electronics Engineers, Domestic conference

  [Invited]

  Invited oral presentation


• 時間計測アプリケーションに向けた抵抗レスで面積利用効率の高い超低電力フルオンチップ弛張発振回路

  ASANO Hiroki, HIROSE Tetsuya, OZAKI Toshihiro, KUROKI Nobutaka, NUMA Masahiro

  電子情報通信学会 集積回路研究専門委員会 学生・若手研究会, Dec. 2017, Japanese, 電子情報通信学会集積回路研究専門委員会, Domestic conference

  Oral presentation


• 超低消費電力32-kHzリアルタイムクロック生成回路

  ASANO Hiroki, HIROSE Tetsuya, TSUBAKI Keishi, MIYOSHI Taro, OZAKI Toshihiro, KUROKI Nobutaka, MUMA Masahiro

  平成29年度VDECデザイナーズフォーラム, Sep. 2017, Japanese, 東京大学大規模集積システム設計教育研究センター, Domestic conference

  Oral presentation


• 畳み込みニューラルネットワークを用いた赤外線画像のカラー化

  MIURA Taiki, KUROKI Nobutaka, HIROSE Tetsuya, NUMA Masahiro

  第16回情報科学技術フォーラム, Sep. 2017, Japanese, 電子情報通信学会，情報処理学会, Domestic conference

  Oral presentation


• 畳み込みニューラルネットワークを用いた改ざんJPEG画像の検出

  TAYA Kunihiko, KUROKI Nobutaka, TAKEDA Naoto, KOBAYASHI Tadashi, SYUKUIN Yasuaki

  第16回情報科学技術フォーラム, Sep. 2017, Japanese, 電子情報通信学会，情報処理学会, Domestic conference

  Oral presentation


• 畳み込みニューラルネットワークと生成型学習法を用いたコンクリートのひび割れ抽出

  OKADA Taiki, KUROKI Nobutaka, HIROSE Tetsuya, NUMA Masahiro

  第16回情報科学技術フォーラム, Sep. 2017, Japanese, 電子情報通信学会，情報処理学会, Domestic conference

  Oral presentation


• 極低入力電圧エネルギーハーベスティングに向けた昇圧コンバータの設計

  TSUJI Yuto, HIROSE Tetsuya, OZAKI Toshihiro, ASANO Hiroki, KUROKI Nobutaka, NUMA Masahiro

  LSIとシステムのワークショップ2017, May 2017, Japanese, 電子情報通信学会集積回路研究専門委員会, Domestic conference

  Poster presentation


• リアルタイムクロックに向けた電流比較型超低電力フルオンチップRC発振器

  ASANO Hiroki, HIROSE Tetsuya, TSUBAKI Keishi, MIYOSHI Taro, OZAKI Toshihiro, KUROKI Nobutaka, NUMA Masahiro

  LSIとシステムのワークショップ2017, May 2017, Japanese, 電子情報通信学会集積回路研究専門委員会, Domestic conference

  Poster presentation


• 時間計測アプリケーションに向けた超低電力フルオンチップ電流比較型RC発振器

  ASANO Hiroki, HIROSE Tetsuya, TSUBAKI Keishi, MIYOSHI Taro, OZAKI Toshihiro, KUROKI Nobutaka, NUMA Masahiro

  電子情報通信学会 集積回路研究専門委員会 集積回路研究会, Jan. 2017, Japanese, 電子情報通信学会集積回路研究専門委員会, みやじま杜の宿, Domestic conference

  Oral presentation


• 適応バイアス技術を用いた低電流・高速スイッチトキャパシタ型増幅回路

  TAKEGAWA Kazuki, HIROSE Tetsuya, OZAKI Toshihiro, ASANO Hiroki, KUROKI Nobutaka, NUMA Masahiro

  電子情報通信学会 集積回路研究専門委員会 集積回路研究会 学生・若手研究会, Dec. 2016, Japanese, 電子情報通信学会集積回路研究専門委員会, 東京工業大学, Domestic conference

  Poster presentation


• 超低電力・環境発電デバイスに向けた最大発電量予測システム

  SATO Takanori, HIROSE Tetsuya, OZAKI Toshihiro, ASANO Hiroki, KUROKI Nobutaka, NUMA Masahiro

  電子情報通信学会 集積回路研究専門委員会 集積回路研究会 学生・若手研究会, Dec. 2016, Japanese, 電子情報通信学会集積回路研究専門委員会, 東京工業大学, Domestic conference

  Poster presentation


• 畳み込みニューラルネットワークを用いたモノクロ画像のカラリゼーション

  ARASHI Yuto, KUROKI Nobutaka, HIROSE Tetsuya, NUMA Masahiro

  第15回情報科学技術フォーラム（FIT2016）, Sep. 2016, Japanese, Domestic conference

  Oral presentation


• 近似を導入した簡略化アルゴリズムに基づくRNN回路のリソース削減と高効率化

  MURATA Daichi, HIROSE Tetsuya, KUROKI Nobutaka, NUMA Masahiro

  電子情報通信学会 リコンフィギャラブルシステム研究会, Sep. 2016, Japanese, Domestic conference

  Oral presentation


• ぶれ画像復元のためのPSF推定に関する研究

  NOHARA Hiroshi, KUROKI Nobutaka, HIROSE Tetsuya, NUMA Masahiro

  第15回情報科学技術フォーラム（FIT2016）, Sep. 2016, Japanese, Domestic conference

  Oral presentation


• ハードウェア化に適した近似関数の導入によるRNN回路のリソース削減と低消費電力化

  MURATA Daichi, MOCHIZUKI Kana, KURODA Kosaku, HIROSE Tetsuya, KUROKI Nobutaka, NUMA Masahiro

  第15回情報科学技術フォーラム（FIT2016）, Sep. 2016, Japanese, Domestic conference

  Oral presentation


• SIFT特徴点を用いたPoint Cloudの位置合わせ手法に関する研究

  YAMAGUCHI Yudai, KUROKI Nobutaka, HIROSE Tetsuya, NUMA Masahiro

  第15回情報科学技術フォーラム（FIT2016）, Sep. 2016, Japanese, Domestic conference

  Oral presentation


• 高速起動を特徴とした間欠動作型VLSIシステム用32-MHzオンチップクロック源回路

  ASANO Hiroki, HIROSE Tetsuya, MIYOSHI Taro, TSUBAKI Keishi, OZAKI Toshihiro, KUROKI Nobutaka, NUMA Masahiro

  電子情報通信学会 集積回路研究専門委員会 集積回路研究会, Aug. 2016, Japanese, 電子情報通信学会集積回路研究専門委員会, 中央電気倶楽部, Domestic conference

  Oral presentation


• 1マイクロ秒以内の高速起動を特徴とする高精度32-MHz弛張発振器

  ASANO Hiroki, HIROSE Tetsuya, MIYOSHI Taro, TSUBAKI Keishi, OZAKI Toshihiro, KUROKI Nobutaka, NUMA Masahiro

  平成28年度VDECデザイナーズフォーラム, Aug. 2016, Japanese, 東京大学大規模集積システム設計教育研究センター, 東京大学大規模集積システム設計教育研究センター, Domestic conference

  Oral presentation


• 間欠動作型VLSIシステムに向けた高速起動可能な32-MHzフルオンチップ弛張発振器

  ASANO Hiroki, HIROSE Tetsuya, MIYOSHI Taro, TSUBAKI Keishi, OZAKI Toshihiro, KUROKI Nobutaka, NUMA Masahiro

  LSIとシステムのワークショップ2016, May 2016, Japanese, 電子情報通信学会集積回路研究専門委員会, 東京大学, Domestic conference

  Poster presentation


• 連写画像におけるノイズ除去のための三次元NL-Means法

  KOBORI Hirokazu, KUROKI Nobutaka, HIROSE Tetsuya, NUMA Masahiro

  第14回情報科学技術フォーラム, Sep. 2015, Japanese, 情報処理学会, 愛媛, Domestic conference

  Oral presentation


• 自己学習型超解像に適用するK-meansクラスタリング処理のハードウェアによる実現

  MURATA Daichi, KIRIYAMA Ayumi, SHIZUKU Yuzuru, HIROSE Tetsuya, KUROKI Nobutaka, NUMA Masahiro

  第14回情報科学技術フォーラム, Sep. 2015, Japanese, 情報処理学会, 愛媛, Domestic conference

  Oral presentation


• 事前教師あり学習を適用したNetwork in Networkによる画像認識の高精度化

  FURUI Syuya, HIROSE Tetsuya, KUROKI Nobutaka, NUMA Masahiro

  第14回情報科学技術フォーラム, Sep. 2015, Japanese, 情報処理学会, 愛媛, Domestic conference

  Oral presentation


• 局所的加重平均を用いた医用断層画像のノイズ除去手法

  KATO Yu, KUROKI Nobutaka, HIROSE Tetsuya, NUMA Masahiro

  第14回情報科学技術フォーラム, Sep. 2015, Japanese, 情報処理学会, 愛媛, Domestic conference

  Oral presentation


• Deformable Part Modelsによる映像中の異常行動検出

  SUGIMOTO Tamotsu, KUROKI Nobutaka, HIROSE Tetsuya, NUMA Masahiro

  第14回情報科学技術フォーラム, Sep. 2015, Japanese, 情報処理学会, 愛媛, Domestic conference

  Oral presentation


• 幅広い電圧レベル変換を実現する低消費電力レベルシフタ

  MATSUZUKA Ryo, HIROSE Tetsuya, SHIZUKU Yuzuru, KUROKI Nobutaka, NUMA Masahiro

  平成27年度 VDECデザイナーズフォーラム, Aug. 2015, Japanese, 東京大学大規模集積システム設計教育研究センター, 石川, Domestic conference

  Oral presentation


• 低電圧入力で動作するマイクロ環境発電のための高効率3端子昇圧コンバータ

  OZAKI Toshihiro, HIROSE Tetsuya, NAGAI Takahiro, TSUBAKI Keishi, KUROKI Nobutaka, NUMA Masahiro

  平成27年度 VDECデザイナーズフォーラム, Aug. 2015, Japanese, 東京大学大規模集積システム設計教育研究センター, 石川, Domestic conference

  Oral presentation


• 振動エネルギーを用いた環境発電のための超低電力・適応バイアス型シリーズレギュレータ

  SADO Kenji, HIROSE Tetsuya, TSUBAKI Keishi, OZAKI Toshihiro, ASANO Hiroki, MATSUMOTO Kaori, KUROKI Nobutaka, NUMA Masahiro

  第41回アナログRF研究会, Jul. 2015, Japanese, 電子情報通信学会, 屋久島, Domestic conference

  Poster presentation


• 低電圧エネルギー・ハーベスティングに向けた高効率3端子昇圧コンバータ

  OZAKI Toshihiro, HIROSE Tetsuya, NAGAI Takahiro, TSUBAKI Keishi, KUROKI Nobutaka, NUMA Masahiro

  LSIとシステムのワークショップ2015, May 2015, Japanese, 電子情報通信学会, 北九州, Domestic conference

  Poster presentation


• 逐次比較AD コンバータに向けたコンパレータのオフセット補正アーキテクチャ

  UEDA Ryota, HIROSE Tetsuya, YAMAUCHI Takahito, TSUBAKI Keishi, KUROKI Nobutaka, NUMA Masahiro

  電子情報通信学会 集積回路研究専門委員会 アナログRF研究会, Jul. 2014, Japanese, 電子情報通信学会, 屋久島町, Domestic conference

  Poster presentation


• 画質評価のための注視重要度の関数近似

  IZUMI Naoyuki, KUROKI Nobutaka, HIROSE Tetsuya, NUMA Masahiro

  電子情報通信学会技術研究報告, Dec. 2013, Japanese, 電子情報通信学会, 浜松市, Domestic conference

  Oral presentation


• 超解像と誤差帰還を用いた電子ズームの構成方法

  SUGAWARA Yuki, TSUCHIKAWA Kento, KUROKI Nobutaka, HIROSE Tetsuya, NUMA Masahiro

  第12回情報科学技術フォーラム（FIT2013）, Sep. 2013, Japanese, 情報処理学会, 鳥取市, Domestic conference

  Oral presentation


• 事例参照型超解像における幾何学模様の学習

  TSUCHIKAWA Kento, SUGAWARA Yuki, IZUMI Naoyuki, KUROKI Nobutaka, HIROSE Tetsuya, NUMA Masahiro

  第12回情報科学技術フォーラム（FIT2013）, Sep. 2013, Japanese, 情報処理学会, 鳥取市, Domestic conference

  Oral presentation


• HOGを用いた識別器の構成方法と歩行者検出への応用

  GOTO Hiroki, IJIRI Shota, OURA Junki, KUROKI Nobutaka, HIROSE Tetsuya, NUMA Masahiro

  第12回情報科学技術フォーラム（FIT2013）, Sep. 2013, Japanese, 情報処理学会, 鳥取市, Domestic conference

  Oral presentation


• 低電圧エネルギー・ハーベスティングに向けた0.27-V入力，効率75%，オンチップ・チャージポンプ回路

  NAGAI Takahiro, HIROSE Tetsuya, TSUBAKI Keishi, KUROKI Nobutaka, NUMA Masahiro

  第26回 回路とシステムワークショップ, Aug. 2013, Japanese, 電子情報通信学会, 淡路市, Domestic conference

  Oral presentation


• 適応バイアス電流生成技術を用いた超低電力・高速Rail-to-Railオペアンプ

  OZAKI Toshihiro, HIROSE Tetsuya, TSUBAKI Keishi, KUROKI Nobutaka, NUMA Masahiro

  LSIとシステムのワークショップ2013, May 2013, Japanese, 電子情報通信学会集積回路研究専門委員会, 北九州市, Domestic conference

  Poster presentation


• ばらつき補正技術を用いたシングルスロープADコンバータ

  NAKAZAWA Akira, HIROSE Tetsuya, OSAKI Yuji, TSUBAKI Keishi, KUROKI Nobutaka, NUMA Masahiro

  LSIとシステムのワークショップ2013, May 2013, Japanese, 電子情報通信学会集積回路研究専門委員会, 北九州市, Domestic conference

  Poster presentation


• 適応バイアス技術を用いた超低電力・高速Rail-to-Railオペアンプ

  OZAKI Toshihiro, HIROSE Tetsuya, TSUBAKI Keishi, KUROKI Nobutaka, NUMRA Masahiro

  電子情報通信学会 総合大会, Mar. 2013, Japanese, 電子情報通信学会, 岐阜, Domestic conference

  Oral presentation


• 低参照電圧を用いた実時間計測用弛張発振回路

  TSUBAKI Keishi, HIROSE Tetsuya, KUROKI Nobutaka, NUMRA Masahiro

  電子情報通信学会 総合大会, Mar. 2013, Japanese, 電子情報通信学会, 岐阜, Domestic conference

  Oral presentation


• 超解像を用いたJPEGコーデックに関する一検討

  KIYOKAWA Masanori, KUROKI Nobutaka, HIROSE Tetsuya, NUMA Masahiro

  情報処理学会オーディオビジュアル複合情報処理研究会, Nov. 2012, Japanese, 情報処理学会, 福井市, Domestic conference

  Oral presentation


• カラー画像の主観的品質とSSIMの関係について

  IZUMI Naoyuki, KUROKI Nobutaka, HIROSE Tetsuya, NUMA Masahiro

  電子情報通信学会イメージ・メディア・クオリティ研究会, Oct. 2012, Japanese, 電子情報通信学会, 京都市, Domestic conference

  Oral presentation


• 野球中継映像におけるスコアテロップのレイアウト認識

  SADAMOTO Taishi, KUROKI Nobutaka, HIROSE Tetsuya, NUMA Masahiro

  電子情報通信学会・情報処理学会 第11回情報科学技術フォーラム(FIT2012), Sep. 2012, Japanese, 電子情報通信学会・情報処理学会, 東京都, Domestic conference

  Oral presentation


• 適応バイアス技術を用いた超低電力CMOSオペアンプの評価

  TSURUYA Yumiko, HIROSE Tetsuya, Osaki Yuji, KUROKI Nobutaka, NUMRA Masahiro, KOBAYASHI Osamu

  電子情報通信学会 ソサイエティ大会, Sep. 2012, Japanese, 電子情報通信学会, 富山, Domestic conference

  Oral presentation


• 超低電圧ダイナミックコンパレータのためのオフセット電圧補正回路の高精度化

  MASUDA Chotaro, HIROSE Tetsuya, Osaki Yuji, KUROKI Nobutaka, NUMRA Masahiro

  電子情報通信学会 ソサイエティ大会, Sep. 2012, Japanese, 電子情報通信学会, 富山, Domestic conference

  Oral presentation


• 組合せ最適化アルゴリズムに基づくオブジェクトとラベルのレイアウト認識

  TSUJI Ryoya, KUROKI Nobutaka, HIROSE Tetsuya, NUMA Masahiro

  電子情報通信学会・情報処理学会 第11回情報科学技術フォーラム(FIT2012), Sep. 2012, Japanese, 電子情報通信学会, 東京都, Domestic conference

  Oral presentation


• 階層的超解像による電子ズームの構成方法

  SUGAHARA Yuki, HASHIMOTO Akinobu, KUROKI Nobutaka, HIROSE Tetsuya, NUMA Masahiro

  電子情報通信学会・情報処理学会 第11回情報科学技術フォーラム(FIT2012), Sep. 2012, Japanese, 電子情報通信学会・情報処理学会, 東京都, Domestic conference

  Oral presentation


• マルチモーダル入力に対応した重み付き多数決による識別器のGPU による高速化

  SASAKI Jin, SAKAMOTO Hiroyuki, Sizuku Yuzuru, KUROKI Nobutaka, HIROSE Tetsuya, NUMA Masahiro

  電子情報通信学会・情報処理学会 第11回情報科学技術フォーラム(FIT2012), Sep. 2012, Japanese, 電子情報通信学会・情報処理学会, 東京都, Domestic conference

  Oral presentation


• コンパレータのバラツキ補正技術を用いた弛張発振回路の評価

  TSUBAKI Keishi, HIROSE Tetsuya, Osaki Yuji, SHIGA Seiichiro, KUROKI Nobutaka, NUMRA Masahiro

  電子情報通信学会 ソサイエティ大会, Sep. 2012, Japanese, 電子情報通信学会, 富山, Domestic conference

  Oral presentation


• ウェーブレット変換に基づく学習型超解像のGPU による高速化手法

  SAKAMOTO Hiroyuki, SASAKI Jin, Sizuku Yuzuru, KUROKI Nobutaka, HIROSE Tetsuya, NUMA Masahiro

  電子情報通信学会・情報処理学会 第11回情報科学技術フォーラム(FIT2012), Sep. 2012, Japanese, 電子情報通信学会・情報処理学会, 東京都, Domestic conference

  Oral presentation


• PVTバラツキ耐性を持つシングルスロープADコンバータ

  Osaki Yuji, HIROSE Tetsuya, KUROKI Nobutaka, NUMRA Masahiro

  電子情報通信学会 ソサイエティ大会, Sep. 2012, Japanese, 電子情報通信学会, 富山, Domestic conference

  Oral presentation


• Bag-of-Visual Words 表現を用いた放送映像中の類似シーン検出

  IJIRI Shota, SADAMOTO Taishi, KUROKI Nobutaka, HIROSE Tetsuya, NUMA Masahiro

  電子情報通信学会・情報処理学会 第11回情報科学技術フォーラム(FIT2012), Sep. 2012, Japanese, 電子情報通信学会, 東京都, Domestic conference

  Oral presentation


• 二分木辞書を用いた学習型超解像のストリーム処理型アーキテクチャ

  MICHIHATA Kohei, Kiriyama Ayumi, KITAYAMA Takahiko, Sizuku Yuzuru, HIROSE Tetsuya, KUROKI Nobutaka, NUMA Masahiro

  情報処理学会 DA シンポジウム2012, Aug. 2012, Japanese, 情報処理学会, 下呂市, Domestic conference

  Oral presentation


• 充足可能性判定に基づく誤り追跡入力生成と機能特定を用いた論理診断手法

  KATAYAMA Naoki, MATSUYAMA Tomoki, WATANABE Kosuke, HIROSE Tetsuya, KUROKI Nobutaka, NUMA Masahiro

  情報処理学会 DA シンポジウム2012, Aug. 2012, Japanese, 情報処理学会, 下呂市, Domestic conference

  Oral presentation


• メタル配線により再構成可能なセルと論理再合成への応用

  KABATA Yudai, TENMA Ken, SENZAKI Hiroto, HIROSE Tetsuya, KUROKI Nobutaka, NUMA Masahiro

  情報処理学会 DA シンポジウム2012, Aug. 2012, Japanese, 情報処理学会, 下呂市, Domestic conference

  Oral presentation


• 適応バイアス型コンパレータを用いたSC型DC-DC コンバータ

  NAKAMURA Daigo, HIROSE Tetsuya, OSAKI Yuji, KUROKI Nobutaka, NUMA Masahiro

  電子情報通信学会 総合大会, Mar. 2012, Japanese, 電子情報通信学会, 岡山市, Domestic conference

  Oral presentation


• 低電圧カレントミラー回路を用いた高精度ナノアンペア電流源

  KITAMURA Junya, HIROSE Tetsuya, OSAKI Yuji, KUROKI Nobutaka, NUMA Masahiro

  電子情報通信学会 総合大会, Mar. 2012, Japanese, 電子情報通信学会, 岡山市, Domestic conference

  Oral presentation


• 超低電力オペアンプの高速化技術

  TSURUYA Yumiko, HIROSE Tetsuya, OSAKI Yuji, KUROKI Nobutaka, NUMA Masahiro, KOBAYASHI Osamu

  電子情報通信学会 総合大会, Mar. 2012, Japanese, 電子情報通信学会, 岡山市, Domestic conference

  Oral presentation


• 超低電圧ダイナミックコンパレータ回路のオフセットキャリブレーション手法の検討

  MASUDA Chotaro, HIROSE Tetsuya, OSAKI Yuji, KUROKI Nobutaka, NUMA Masahiro

  電子情報通信学会 総合大会, Mar. 2012, Japanese, 電子情報通信学会, 岡山市, Domestic conference

  Oral presentation


• 準連続モードで動作するデジタル制御昇圧回路

  SAITO Yusuke, HIROSE Tetsuya, OSAKI Yuji, KUROKI Nobutaka, NUMA Masahiro

  電子情報通信学会 総合大会, Mar. 2012, Japanese, 電子情報通信学会, 岡山市, Domestic conference

  Oral presentation


• 高分解能SAR ADCに向けた容量DACの面積削減の検討

  YAMAUCHI Takahito, HIROSE Tetsuya, OSAKI Yuji, KUROKI Nobutaka, NUMA Masahiro

  電子情報通信学会 総合大会, Mar. 2012, Japanese, 電子情報通信学会, 岡山市, Domestic conference

  Oral presentation


• 光エネルギー・ハーベスティングに向けたチャージポンプ回路の負荷電流特性改善

  NAGAI Takahiro, HIROSE Tetsuya, OSAKI Yuji, KUROKI Nobutaka, NUMA Masahiro

  電子情報通信学会 総合大会, Mar. 2012, Japanese, 電子情報通信学会, 岡山市, Domestic conference

  Oral presentation


• 逆流電流削減による差動型整流回路の変換効率改善

  TSUKAMOTO Mizuho, HIROSE Tetsuya, OSAKI Yuji, KUROKI Nobutaka, NUMA Masahiro, HASHIMOTO Masanori

  電子情報通信学会 総合大会, Mar. 2012, Japanese, 電子情報通信学会, 岡山市, Domestic conference

  Oral presentation


• カラー画像の品質評価に関する検討

  IZUMI Naoyuki, NAKAYA Tomohiro, KAWASHIMA Kazumi, KUROKI Nobutaka, HIROSE Tetsuya, NUMA Masahiro

  電子情報通信学会 パターン認識・メディア理解研究会, Mar. 2012, Japanese, 電子情報通信学会, 神戸市, Domestic conference

  Oral presentation


• 適応バイアス電流生成技術を用いたナノワットパワー・オペアンプの高速化

  TSURUYA Yumiko, HIROSE Tetsuya, OSAKI Yuji, KUROKI Nobutaka, NUMA Masahiro, 小林 修

  STARCシンポジウムFY2011, Feb. 2012, Japanese, STARC, 横浜市, Domestic conference

  Poster presentation


• 学習型超解像のための高能率な辞書

  HASHIMOTO Akinobu, NAKAYA Tomohiro, KUROKI Nobutaka, HIROSE Tetsuya, NUMA Masahiro

  電子情報通信学会 画像工学研究会, Nov. 2011, Japanese, 電子情報通信学会, 飯塚市, Domestic conference

  Oral presentation


• 超低電力CMOS温度センサの評価

  NAGAYAMA Toshi, HIROSE Tetsuya, OSAKI Yuji, KUROKI Nobutaka, NUMA Masahiro

  電子情報通信学会 ソサイエティ大会, Sep. 2011, Japanese, 電子情報通信学会, 札幌市, Domestic conference

  Oral presentation


• 学習型超解像における高周波パッチの探索および生成手法

  NAKAYA Tomohiro, CHIKAMATSU Shingo, HASHIMOTO Akinobu, KUROKI Nobutaka, HIROSE Tetsuya, NUMA Masahiro

  電子情報通信学会・情報処理学会 第10回情報科学技術フォーラム(FIT2011), Sep. 2011, Japanese, 電子情報通信学会・情報処理学会, 函館市, Domestic conference

  Oral presentation


• マルチモーダル入力に対応した重み付き多数決による識別器

  TSUJI Ryoya, NISHIDA Takashi, MOMOSAKI Masashi, KUROKI Nobutaka, HIROSE Tetsuya, NUMA Masahiro

  電子情報通信学会・情報処理学会 第10回情報科学技術フォーラム(FIT2011), Sep. 2011, Japanese, 電子情報通信学会・情報処理学会, 函館市, Domestic conference

  Oral presentation


• コンパレータのバラツキ補正回路を用いた弛張発振回路

  SHIGA Seiichiro, HIROSE Tetsuya, OSAKI Yuji, KUROKI Nobutaka, NUMA Masahiro

  電子情報通信学会 ソサイエティ大会, Sep. 2011, Japanese, 電子情報通信学会, 札幌市, Domestic conference

  Oral presentation


• 修正可能な外部出力数に着目した部分修正に基づく論理診断手法

  MATSUYAMA Tomoki, WATANABE Kosuke, SENZAKI Hiroto, HIROSE Tetsuya, KUROKI Nobutaka, NUMA Masahiro

  情報処理学会 DAシンポジウム2011, Aug. 2011, Japanese, 情報処理学会, 下呂市, Domestic conference

  Oral presentation


• ビット構成の異なる加算器を組み合わせた木構造部分積加算回路による乗算器のグリッチ削減

  Son Yang-uk, SHIZUKU Yuzuru, KOGURE Takeshi, HIROSE Tetsuya, KUROKI Nobutaka, NUMA Masahiro

  情報処理学会 DAシンポジウム2011, Aug. 2011, Japanese, 情報処理学会, 下呂市, Domestic conference

  Oral presentation


• SVMに基づく画像認識処理のGPUを用いた高速化手法

  SASAKI Jin, SHIZUKU Yuzuru, HIROSE Tetsuya, KUROKI Nobutaka, NUMA Masahiro

  情報処理学会 DAシンポジウム2011, Aug. 2011, Japanese, 情報処理学会, 下呂市, Domestic conference

  Oral presentation


• 超低電圧ディジタル回路に向けた入出力論理補正レベルシフタ回路

  OSAKI Yuji, HIROSE Tetsuya, KUROKI Nobutaka, NUMA Masahiro

  電子情報通信学会 集積回路研究会, Jul. 2011, Japanese, 電子情報通信学会, 広島市, Domestic conference

  Oral presentation


• 基板バイアス制御を用いた超低電圧センスアンプ回路の高速化

  MASUDA Chotaro, HIROSE Tetsuya, OSAKI Yuji, KUROKI Nobutaka, NUMA Masahiro

  電子情報通信学会 集積回路研究会, Jul. 2011, Japanese, 電子情報通信学会, 広島市, Domestic conference

  Oral presentation


• 微小オフセット電圧による温度特性を改善した基準電流源回路

  OSAKI Yuji, HIROSE Tetsuya, KUROKI Nobutaka, NUMA Masahiro

  電子情報通信学会 第24回 シリコンアナログRF研究会, Mar. 2011, Japanese, 電子情報通信学会, 東京, Domestic conference

  Oral presentation


• 熱電変換素子を用いた電力変換インターフェース回路

  SAITO Yusuke, HIROSE Tetsuya, OSAKI Yuji, KUROKI Nobutaka, NUMA Masahiro

  電子情報通信学会総合大会, Mar. 2011, Japanese, 電子情報通信学会, 東京, Domestic conference

  Oral presentation


• 超低電力CMOSスマート温度センサ回路

  NAGAYAMA Toshi, HIROSE Tetsuya, OSAKI Yuji, KUROKI Nobutaka, NUMA Masahiro

  電子情報通信学会総合大会, Mar. 2011, Japanese, 電子情報通信学会, 東京, Domestic conference

  Oral presentation


• 超低電圧SRAM用センスアンプ回路のプリチャージ動作の高速化

  MASUDA Chotaro, HIROSE Tetsuya, OSAKI Yuji, MATSUMOTO Kei, KUROKI Nobutaka, NUMA Masahiro

  電子情報通信学会総合大会, Mar. 2011, Japanese, 電子情報通信学会, 東京, Domestic conference

  Oral presentation


• 極低消費電力バンドギャップリファレンス回路の高精度化

  KITAMURA Junya, HIROSE Tetsuya, OSAKI Yuji, KUROKI Nobutaka, NUMA Masahiro

  電子情報通信学会総合大会, Mar. 2011, Japanese, 電子情報通信学会, 東京, Domestic conference

  Oral presentation


• ナノアンペア電流源回路の電流バラツキ補正

  ISONO Kosuke, HIROSE Tetsuya, OSAKI Yuji, KUROKI Nobutaka, NUMA Masahiro

  電子情報通信学会総合大会, Mar. 2011, Japanese, 電子情報通信学会, 東京, Domestic conference

  Oral presentation


• サブスレッショルド・ディジタルLSIに向けた遅延制御回路技術

  SHIGA Seichiro, HIROSE Tetsuya, OSAKI Yuji, KUROKI Nobutaka, NUMA Masahiro

  電子情報通信学会総合大会, Mar. 2011, Japanese, 電子情報通信学会, 東京, Domestic conference

  Oral presentation


• サブスレッショルドLSIに適したオンチップ電源回路の検討

  NAKAMURA Daigo, HIROSE Tetsuya, OSAKI Yuji, KUROKI Nobutaka, NUMA Masahiro

  電子情報通信学会総合大会, Mar. 2011, Japanese, 電子情報通信学会, 東京, Domestic conference

  Oral presentation


• A 95-nA, 523ppm/C, 0.6-uW CMOS Current Reference Circuit with Subthreshold MOS Resistor Ladder

  OSAKI Yuji, HIROSE Tetsuya, KUROKI Nobutaka, NUMA Masahiro

  The 16th Asia and South Pacific Design Automation Conference, Jan. 2011, English, IEEE, 横浜市, International conference

  Oral presentation


• A CMOS Bandgap and Sub-Bandgap Voltage Reference Circuits for Nanowatt Power LSIs

  HIROSE Tetsuya, UENO Ken, KUROKI Nobutaka, NUMA Masahiro

  IEEE Asian Solid-State Circuits Conference 2011, Nov. 2010, English, IEEE, 北京(中国), International conference

  Oral presentation


• An incremental synthesis technique for ECO based on iterative procedure for error diagnosis and spare cell assignment

  WATANABE Kosuke, SENZAKI Hiroto, SHIOKI Kosuke, HIROSE Tetsuya, KUROKI Nobutaka, NUMA Masahiro

  Synthesis And System Integration of Mixed Information technologies 2010 (SASIMI2010), Oct. 2010, English, SASIMI Organizing Committee, Taipei,TW., International conference

  Oral presentation


• An incremental synthesis technique based on error diagnosis and technology remapping for clusters

  SENZAKI Hiroto, WATANABE Kosuke, SHIOKI Kosuke, HIROSE Tetsuya, KUROKI Nobutaka, NUMA Masahiro

  Synthesis And System Integration of Mixed Information technologies 2010 (SASIMI2010), Oct. 2010, English, SASIMI Organizing Committee, Taipei,TW., International conference

  Oral presentation


• 入力信号間に生じる遅延を考慮した桁上げ吸収回路の低消費電力化

  雫 譲, 藤岡 達也, 小暮 武, 廣瀬 哲也, 黒木 修隆, 沼 昌宏

  DA シンポジウム2010, Sep. 2010, Japanese, 情報処理学会, 豊橋市, Domestic conference

  Oral presentation


• 書き込み安定性を向上させたサブスレッショルドSRAM

  MATSUMOTO Kei, HIROSE Tetsuya, OSAKI Yuji, KUROKI Nobutaka, NUMA Masahiro

  電子情報通信学会 ソサイエティ大会, Sep. 2010, Japanese, 電子情報通信学会, さかい, Domestic conference

  Oral presentation


• 局所ヒストグラムの時間変動に着目したディゾルブ検出手法

  前田 憲志, 田中 孝志, 黒木 修隆, 廣瀬 哲也, 沼 昌宏

  第9回情報科学技術フォーラム (FIT2010), Sep. 2010, Japanese, 電子情報通信学会, 福岡市, Domestic conference

  Oral presentation


• クラスタ単位のセル割当てを用いた論理再合成手法

  千崎 弘人, 渡辺 浩介, 塩木 講輔, 廣瀬 哲也, 黒木 修隆, 沼 昌宏

  DA シンポジウム2010, Sep. 2010, Japanese, 情報処理学会, 豊橋市, Domestic conference

  Oral presentation


• ウェーブレット係数の主成分分析を用いた学習型超解像

  中矢 知宏, 近松 慎伍, 黒木 修隆, 廣瀬 哲也, 沼 昌宏

  第9回情報科学技術フォーラム (FIT2010), Sep. 2010, Japanese, 電子情報通信学会, 福岡市, Domestic conference

  Oral presentation


• TFFを用いた相補構成スイッチトキャパシタ型DC-DC コンバータ

  TSUJIKAWA Takuya, HIROSE Tetsuya, OSAKI Yuji, KUROKI Nobutaka, NUMA Masahiro

  電子情報通信学会 ソサイエティ大会, Sep. 2010, Japanese, 電子情報通信学会, 堺市, Domestic conference

  Oral presentation


• Temperature Compensated Nano-Ampere CMOS Current Reference Circuit Using Small Offset Voltage

  OSAKI Yuji, HIROSE Tetsuya, KUROKI Nobutaka, NUMA Masahiro

  2010 International Conference on Solid State Devices and Materials, Sep. 2010, English, JSAP, 東京, International conference

  Oral presentation


• A nano-ampere current reference circuit and its temperature dependence control by using temperature characteristics of carrier mobilities

  HIROSE Tetsuya, OSAKI Yuji, KUROKI Nobutaka, NUMA Masahiro

  The 36th European Solid-State Circuits Conference, Sep. 2010, English, IEEE, セビリア(スペイン), International conference

  Oral presentation


• 適応バイアス技術を用いた超低電力コンパレータのチップ測定

  TSUBAKI Keishi, HIROSE Tetsuya, KUROKI Nobutaka, NUMA Masahiro

  STARCフォーラム/シンポジウム2010, Aug. 2010, Japanese, 半導体理工学研究センター, 横浜市, Domestic conference

  Poster presentation


• Write-Assisted Subthreshold SRAM by Using On-Chip Threshold Voltage Monitoring Circuit

  MATSUMOTO Kei, HIROSE Tetsuya, OSAKI Yuji, KUROKI Nobutaka, NUMA Masahiro

  2010 IEEE International 53rd Midwest Symposium on Circuits and Systems, Aug. 2010, English, IEEE, シアトル(米国), International conference

  Oral presentation


• Nano-Ampere CMOS Current Reference with Little Temperature Dependence Using Small Offset Voltage

  OSAKI Yuji, HIROSE Tetsuya, KUROKI Nobutaka, NUMA Masahiro

  2010 IEEE International 53rd Midwest Symposium on Circuits and Systems, Aug. 2010, English, IEEE, シアトル(米国), International conference

  Oral presentation


• 低電圧ディジタルLSIのためのレベルコンバータ回路

  OSAKI Yuji, HIROSE Tetsuya, KUROKI Nobutaka, NUMA Masahiro

  電子情報通信学会 集積回路研究会, Jul. 2010, Japanese, 電子情報通信学会, 大阪市, Domestic conference

  Oral presentation


• 超低電力で動作するオンチップ参照クロック源

  ISONO Kosuke, HIROSE Tetsuya, OSAKI Yuji, KUROKI Nobutaka, NUMA Masahiro

  LSIとシステムのワークショップ2010, May 2010, Japanese, 電子情報通信学会, 北九州市, Domestic conference

  Poster presentation


• サブスレッショルド・ディジタル回路のためのオンチップ遅延バラツキ補正回路の評価

  OSAKI Yuji, HIROSE Tetsuya, MATSUMOTO Kei, TSUJIKAWA Takuya, KUROKI Nobutaka, NUMA Masahiro

  LSIとシステムのワークショップ2010, May 2010, Japanese, 電子情報通信学会, 北九州市, Domestic conference

  Poster presentation


• サブスレッショルドLSIにむけた低電圧レギュレータ回路

  NAGAYAMA Toshi, HIROSE Tetsuya, OSAKI Yuji, KUROKI Nobutaka, NUMA Masahiro

  LSIとシステムのワークショップ2010, May 2010, Japanese, 電子情報通信学会, 北九州市, Domestic conference

  Poster presentation


• Super-Resolution Technique for Thermography with Dual-Camera System

  CHIKAMATSU Shingo, NAKAYA Tomohiro, KODA Masakazu, HIROSE Tetsuya, KUROKI Nobutaka, NUMA Masahiro

  IEEE International Symposium on Circuits and Systems (ISCAS 2010), May 2010, English, IEEE, Paris,FR., International conference

  Oral presentation


• 汎用監視支援システムの構築-動き特徴量の抽出-

  西田 喬士, 百崎 将志, 辻 亮弥, 熊谷 拓也, 黒木 修隆, 沼 昌宏

  第38回知能システムシンポジウム, Mar. 2010, Japanese, 計測自動制御学会, 神戸市, Domestic conference

  Oral presentation


• 汎用監視支援システムの構築-HOG特徴量と動き特徴量を用いた識別-

  百崎 将志, 西田 喬士, 辻 亮弥, 熊谷 拓也, 黒木 修隆, 沼 昌宏

  第38回知能システムシンポジウム, Mar. 2010, Japanese, 計測自動制御学会, 神戸市, Domestic conference

  Oral presentation


• 適応バイアス技術を用いた極低消費電流コンパレータ

  TSUBAKI Keishi, HIROSE Tetsuya, OSAKI Yuji, KUROKI Nobutaka, NUMA Masahiro

  電子情報通信学会総合大会, Mar. 2010, Japanese, 電子情報通信学会(IEICE), 仙台, Domestic conference

  Oral presentation


• 低電圧サブスレッショルドLSIに向けたリニア・レギュレータ回路

  NAGAYAMA Toshi, HIROSE Tetsuya, OSAKI Yuji, KUROKI Nobutaka, NUMA Masahiro

  電子情報通信学会総合大会, Mar. 2010, Japanese, 電子情報通信学会(IEICE), 仙台, Domestic conference

  Oral presentation


• デューティ制御回路を用いたスイッチトキャパシタ型DC-DCコンバータ

  TSUJIKAWA Takuya, HIROSE Tetsuya, OSAKI Yuji, KUROKI Nobutaka, NUMA Masahiro

  電子情報通信学会総合大会, Mar. 2010, Japanese, 電子情報通信学会(IEICE), 仙台, Domestic conference

  Oral presentation


• サブスレッショルドCMOSディジタル回路の遅延バラツキ補正アーキテクチャの評価

  OSAKI Yuji, HIROSE Tetsuya, MATSUMOTO Kei, KUROKI Nobutaka, NUMA Masahiro

  電子情報通信学会総合大会, Mar. 2010, Japanese, 電子情報通信学会(IEICE), 仙台, Domestic conference

  Oral presentation


• Source-Coupled Logic回路を用いたサブスレッショルドSRAMセルの検討

  MATSUMOTO Kei, HIROSE Tetsuya, OSAKI Yuji, KUROKI Nobutaka, NUMA Masahiro

  電子情報通信学会総合大会, Mar. 2010, Japanese, 電子情報通信学会(IEICE), 仙台, Domestic conference

  Oral presentation


• PVTバラツキ耐性を有する基準クロック発振回路

  ISONO Kosuke, HIROSE Tetsuya, OSAKI Yuji, MATSUMOTO Kei, KUROKI Nobutaka, NUMA Masahiro

  電子情報通信学会総合大会, Mar. 2010, Japanese, 電子情報通信学会(IEICE), 仙台, Domestic conference

  Oral presentation


• 野球中継番組におけるテロップ情報を用いたダイジェスト映像自動生成

  田中 孝志, 小方 善貴, 片岡 充照, 黒木 修隆, 沼 昌宏

  映像情報メディア学会メディア工学研究会, Dec. 2009, Japanese, ITE, 松本市, Domestic conference

  Oral presentation


• 回路構造を考慮した修正箇所候補抽出に基づく論理診断手法

  塩木 講輔, 渡辺 浩介, 岡田 匠史, 石原 俊郎, 廣瀬 哲也, 黒木 修隆, 沼 昌宏

  情報処理学会研究報告, Dec. 2009, Japanese, IPSJ, 高知市, Domestic conference

  Oral presentation


• ハイブリッド型CMOS論理構成の4-2加算器による乗算器のグリッチ削減

  小暮 武, 藤岡 達也, 雫 譲, 廣瀬 哲也, 黒木 修隆, 沼 昌宏

  情報処理学会研究報告, Dec. 2009, Japanese, IPSJ, 高知市, Domestic conference

  Oral presentation


• An on-chip delay compensation for nano-power subthreshold CMOS digital LSIs

  OSAKI Yuji, HIROSE Tetsuya, MATSUMOTO Kei, TSUJIKAWA Takuya, TSUBAKI Keishi, KUROKI Nobutaka, NUMA Masahiro

  Workshop on Information; Nano and Photonics Technology 2009, Dec. 2009, English, 神戸大学, 連携創造本部先端研究推進部門, Kobe, Japan, International conference

  Poster presentation


• クロス形状フラクタルを用いた画像の高解像度化

  近松 慎伍, 中矢 知宏, 黒木 修隆, 廣瀬 哲也, 沼 昌宏

  電子情報通信学会第24回信号処理シンポジウム, Nov. 2009, Japanese, IEICE, 鹿児島市, Domestic conference

  Oral presentation


• 極低電力サブスレッショルド・ディジタル回路のオンチップ遅延バラツキ補正技術

  OSAKI Yuji, HIROSE Tetsuya, MATSUMOTO Kei, KUROKI Nobutaka, NUMA Masahiro

  電子情報通信学会 集積回路研究会, Oct. 2009, Japanese, 電子情報通信学会(IEICE), 東京, Domestic conference

  Oral presentation


• Variation Tolerant Subthreshold Adder Design for Ultra-low Power LSIs

  OSAKI Yuji, HIROSE Tetsuya, MATSUMOTO Kei, KUROKI Nobutaka, NUMA Masahiro

  The 35th European Solid-State Circuits Conference, Sep. 2009, English, 米国電気電子学会(IEEE), Athens, Greece, International conference

  Poster presentation


• 素子のクラスタリングを用いた論理診断手法

  塩木 講輔, 岡田 匠史, 渡辺 浩介, 廣瀬 哲也, 黒木 修隆, 沼 昌宏

  情報処理学会DAシンポジウム2009, Aug. 2009, Japanese, IPSJ, 加賀市, Domestic conference

  Oral presentation


• 信号線欠落に対応した論理診断における変更箇所数削減

  渡辺 浩介, 塩木 講輔, 岡田 匠史, 廣瀬 哲也, 黒木 修隆, 沼 昌宏

  情報処理学会DAシンポジウム2009, Aug. 2009, Japanese, IPSJ, 加賀市, Domestic conference

  Oral presentation


• Switching-voltage detection and compensation circuits for ultra-low-voltage CMOS inverters

  MATSUMOTO Kei, HIROSE Tetsuya, OSAKI Yuji, KUROKI Nobutaka, NUMA Masahiro

  52nd. IEEE International Midwest Symposium on Circuits and Systems, Aug. 2009, English, 米国電気電子学会(IEEE), Cancun, Mexico, International conference

  Oral presentation


• Delay-compensation techniques for ultra-low-power subthreshold CMOS digital LSIs

  OSAKI Yuji, HIROSE Tetsuya, MATSUMOTO Kei, KUROKI Nobutaka, NUMA Masahiro

  52nd. IEEE International Midwest Symposium on Circuits and Systems, Aug. 2009, English, 米国電気電子学会(IEEE), Cancun, Mexico, International conference

  Oral presentation


• 逆流電流遮断による同期整流型DC-DCコンバータの電力変換効率改善

  TSUJIKAWA Takuya, HIROSE Tetsuya, OSAKI Yuji, MATSUMOTO Kei, KUROKI Nobutaka, NUMA Masahiro

  東京大学VDECデザイナーズフォーラム2009, Jun. 2009, Japanese, 東京大学VDEC, 東京, Domestic conference

  Poster presentation


• PVTバラツキ特性を改善したサブスレッショルド電流源

  MATSUMOTO Kei, HIROSE Tetsuya, KITO Toyoaki, OSAKI Yuji, KUROKI Nobutaka, NUMA Masahiro

  東京大学VDECデザイナーズフォーラム2009, Jun. 2009, Japanese, 東京大学VDEC, 東京, Domestic conference

  Poster presentation


• サブスレッショルド・ディジタル回路における遅延時間制御の一設計手法

  OSAKI Yuji, HIROSE Tetsuya, MATSUMOTO Kei, TSUJIKAWA Takuya, KUROKI Nobutaka, NUMA Masahiro

  電子情報通信学会 LSIとシステムのワークショップ2009, May 2009, Japanese, 電子情報通信学会(IEICE), 北九州, Domestic conference

  Poster presentation


• インダクタの逆流電流検出回路を用いた高効率同期整流型DC-DCコンバータ

  TSUJIKAWA Takuya, HIROSE Tetsuya, OSAKI Yuji, MATSUMOTO Kei, KUROKI Nobutaka, NUMA Masahiro

  電子情報通信学会 LSIとシステムのワークショップ2009, May 2009, Japanese, 電子情報通信学会(IEICE), 北九州, Domestic conference

  Poster presentation


• MOSFETのキャリア移動度温度特性を利用した基準電流源回路

  MATSUMOTO Kei, HIROSE Tetsuya, KITO Toyoaki, OSAKI Yuji, KUROKI Nobutaka, NUMA Masahiro

  電子情報通信学会 LSIとシステムのワークショップ2009, May 2009, Japanese, 電子情報通信学会(IEICE), 北九州, Domestic conference

  Poster presentation


• 電源電圧制御によるサブスレッショルド・ディジタル回路のプロセスバラツキ補正技術

  大﨑 勇士, HIROSE Tetsuya, 松本 啓, 黒木 修隆, 沼 昌宏

  電子情報通信学会総合大会, Mar. 2009, Japanese, IEICE, 松山, Domestic conference

  Oral presentation


• 軽負荷動作時の逆流電流損失を改善した同期整流型DC-DCコンバータ

  辻川 琢也, HIROSE Tetsuya, 大﨑 勇士, 黒木 修隆, 沼 昌宏

  電子情報通信学会総合大会, Mar. 2009, Japanese, IEICE, 松山, Domestic conference

  Oral presentation


• サブスレッショルドCMOS LSIに向けたスイッチトキャパシタ型DC-DCコンバータ

  石井 翔, HIROSE Tetsuya, 大﨑 勇士, 黒木 修隆, 沼 昌宏

  電子情報通信学会総合大会, Mar. 2009, Japanese, IEICE, 松山, Domestic conference

  Oral presentation


• MOSFETのしきい値電圧差を利用した参照電圧源回路

  松本 啓, HIROSE Tetsuya, 大﨑 勇士, 黒木 修隆, 沼 昌宏

  電子情報通信学会総合大会, Mar. 2009, Japanese, IEICE, 松山, Domestic conference

  Oral presentation


• MOSFETのキャリア移動度温度特性を利用した基準電流源回路

  鬼頭 豊明, HIROSE Tetsuya, 大﨑 勇士, 黒木 修隆, 沼 昌宏

  電子情報通信学会総合大会, Mar. 2009, Japanese, IEICE, 松山, Domestic conference

  Oral presentation


• An error diagnosis technique based on location sets to rectify subcircuits

  SHIOKI Kosuke, OKADA Narumi, ISHIHARA Toshiro, HIROSE Tetsuya, KUROKI Nobutaka, NUMA Masahiro

  15th Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI 2009), Mar. 2009, English, 沖縄, International conference

  Poster presentation


• An On-Chip Threshold Voltage Difference Monitor Circuit for Nano-Power Sub-threshold Digital LSIs

  K. Matsumoto, HIROSE Tetsuya, Y. Osaki, KUROKI Nobutaka, NUMA Masahiro

  Workshop on Information, Nano, and Photonics Technology, Nov. 2008, English, 神戸大学産学連携推進本部, 神戸, International conference

  Poster presentation


• 野球中継番組におけるダイジェスト映像自動生成

  小方 善貴, 中村 大輔, 片岡 充照, 黒木 修隆, 沼 昌宏

  第7回情報科学技術フォーラム, Sep. 2008, Japanese, 神奈川県藤沢市, Domestic conference

  Oral presentation


• 赤外線サーモグラフィのための超解像手法

  幸田 真和, 黒木 修隆, 沼 昌宏

  第7回情報科学技術フォーラム, Sep. 2008, Japanese, 神奈川県藤沢市, Domestic conference

  Oral presentation


• Total Variationに基づく画像雑音除去の高速化手法

  大谷 宏文, 平田 健悟, 黒木 修隆, 沼 昌宏

  第7回情報科学技術フォーラム, Sep. 2008, Japanese, 神奈川県藤沢市, Domestic conference

  Oral presentation


• 部分回路の修正箇所情報を利用した論理診断手法

  塩木 講輔, 岡田 匠史, 石原 俊郎, 黒木 修隆, 沼 昌宏

  情報処理学会DA シンポジウム2008, Aug. 2008, Japanese, 静岡県浜松市, Domestic conference

  Oral presentation


• Fading Compensation for OFDM Mobile Reception Using Guard Interval

  OSAKI Yuji, SATO Shinya, HORIUCHI Syunsuke, KUROKI Nobutaka, NUMA Masahiro

  13th International OFDM-Workshop 2008, Aug. 2008, English, Hamburg, Germany, International conference

  Oral presentation


• An LUT-Based Error Diagnosis Technique Extended for Multiple Missing Line Errors Based on Iterative Diagnosis Procedure

  ISHIHARA Toshiro, ARAI Ryosuke, OKADA Narumi, KUROKI Nobutaka, NUMA Masahiro

  14th Workshop on Synthesis And System Integration of Mixed Information technologies, Oct. 2007, English, IEEE Sapporo Section, 札幌市, International conference

  Oral presentation


• An Error Diagnosis Technique Based on Specifications with Don't Cares

  OKADA Narumi, IIDA Takayuki, ISHIHARA Toshiro, KUROKI Nobutaka, NUMA Masahiro

  14th Workshop on Synthesis And System Integration of Mixed Information technologies, Oct. 2007, English, IEEE Sapporo Section, 札幌市, International conference

  Oral presentation


• ルームミラー装着式車内カメラの自動キャリブレーションと運転者の頭部位置推定

  INOI Kosaku, KUROKI Nobutaka, NUMA Masahiro

  第6回情報科学技術フォーラム, Sep. 2007, Japanese, 情報処理学会, 豊田市, Domestic conference

  Oral presentation


• クローズドキャプションを用いた野球映像インデキシング

  NAKAMURA Daisuke, YAMANAKA Takahiro, KATAOKA Mitsuteru, KUROKI Nobutaka, NUMA Masahiro, YAMAMOTO Keisuke

  第6回情報科学技術フォーラム, Sep. 2007, Japanese, 情報処理学会, 豊田市, Domestic conference

  Oral presentation


• クローズドキャプションを用いたニュース番組におけるトピック分割手法

  HINOUE Naoki, KATAOKA Mitsuteru, KUROKI Nobutaka, NUMA Masahiro, YAMAMOTO Keisuke

  第6回情報科学技術フォーラム, Sep. 2007, Japanese, 情報処理学会, 豊田市, Domestic conference

  Oral presentation


• 補正乗算器の動的割当てによるVSBイコライザの消費電力削減

  HORIUCHI Syunsuke, SATO Shinya, YAMAMOTO Akinori, KAWASHIMA Kazumi, KUROKI Nobutaka, NUMA Masahiro

  情報処理学会 DA シンポジウム2007, Aug. 2007, Japanese, 情報処理学会, 浜松市, Domestic conference

  Oral presentation


• 部分回路の修正解に含まれるドントケアを考慮した論理診断手法

  ISHIHARA Toshiro, NUKUMIZU Shinichi, OKADA Narumi, ARAI Ryosuke, KUROKI Nobutaka, NUMA Masahiro

  情報処理学会 DA シンポジウム2007, Aug. 2007, Japanese, 情報処理学会, 浜松市, Domestic conference

  Oral presentation


• 演算量を抑えたOFDM 移動受信のためのICI 除去

  SATO Shinya, HORIUCHI Syunsuke, YAMAMOTO Akinori, KAWASHIMA Kazumi, KUROKI Nobutaka, NUMA Masahiro

  電子情報通信学会技術研究報告, Aug. 2007, Japanese, 電子情報通信学会, 高知市, Domestic conference

  Oral presentation


• タイミングを考慮した論理再合成手法

  OKADA Narumi, ISHIHARA Toshiro, ARAI Ryosuke, KUROKI Nobutaka, NUMA Masahiro

  情報処理学会 DA シンポジウム2007, Aug. 2007, Japanese, 情報処理学会, 浜松市, Domestic conference

  Oral presentation


• 赤外線ポインタと画像処理によるプレゼンテーション支援システム

  二宮 憲一, 黒木 修隆, 沼 昌宏

  FIT2006, Sep. 2006, Japanese, 福岡大学, Domestic conference

  Oral presentation


• 視覚特性を考慮した誤差拡散法によるディスプレイの高階調化

  山本 和秀, 黒木 修隆, 沼 昌宏

  FIT2006, Sep. 2006, Japanese, 福岡大学, Domestic conference

  Oral presentation


• 医療用液晶ディスプレイのための3 倍密度誤差拡散法とその拡散係数の改善

  中出 優志, 黒木 修隆, 沼 昌宏

  FIT2006, Sep. 2006, Japanese, 福岡大学, Domestic conference

  Oral presentation


• 近赤外線パルス照明とステレオカメラを用いた運転手の頭部追跡手法

  KONISI Sinpei, KUROKI Nobutaka, YAMANE Tomoyuki, NUMA Masahiro, YAMAMOTO Keisuke

  電子情報通信学会ITS研究会, Sep. 2005, Japanese, 機械振興会館, Domestic conference

  Oral presentation


• 複数の信号線欠落誤りに対応した論理診断手法

  ARAI Ryosuke, YAMANAKA Takahiro, IIDA Takayuki, SUGANE Tosifumi, KUROKI Nobutaka, NUMA Masahiro

  DAシンポジウム2005, Aug. 2005, Japanese, 情報処理学会 システムLSI設計技術研究会, 遠鉄ホテルエンパイア, Domestic conference

  Oral presentation


• OFDM復調用FFTの消費電力削減

  YAMAMOTO Yu, HASHIGUCHI Yusuke, NAKANISHI Masayuki, KUROKI Nobutaka, NUMA Masahiro

  DAシンポジウム2005, Aug. 2005, Japanese, 情報処理学会 システムLSI設計技術研究会, 遠鉄ホテルエンパイア, Domestic conference

  Oral presentation


• 色相情報を用いた高速な頭部領域検出手法について

  高島 善政, 黒木 修隆, 山本 啓輔, 多田 幸生

  システム制御情報学会第3回サイバネティック・フレキシブルオートメーションシンポジウム, 2003, Japanese, システム制御情報学会, 千里ライフサイエンスセンター, Domestic conference

  Oral presentation


• 医用画像DICOMの可逆圧縮に関する検討

  上田 篤史, 黒木 修隆, 沼 昌宏

  第2回情報科学技術フォーラム, 2003, Japanese, 情報処理学会, 札幌学院大学, Domestic conference

  Oral presentation


• マルチカメラ映像からの球追跡のための一手法

  山根 知之, 黒木 修隆, 沼 昌宏

  第2回情報科学技術フォーラム, 2003, Japanese, 情報処理学会, 札幌学院大学, Domestic conference

  Oral presentation


• ディスプレイの画素形状に応じた光学的画像処理による映像品質の改善

  眞邉 隆弘, 黒木 修隆, 沼 昌宏, 山本 啓輔

  映像情報メディア学年年次大会, 2003, Japanese, 映像情報メディア学会, 未記入, Domestic conference

  Oral presentation


• ディジタルディスプレイのための疑似階調表現手法とその客観評価

  黒木 修隆, 沼 昌宏, 山本 啓輔

  映像情報メディア学年年次大会, 2003, Japanese, 映像情報メディア学会, 未記入, Domestic conference

  Oral presentation


• サブフィールド法における発光パターンの解析と評価

  川西 亮一, 黒木 修隆, 沼 昌宏, 山本 啓輔

  映像情報メディア学年年次大会, 2003, Japanese, 映像情報メディア学会, 未記入, Domestic conference

  Oral presentation

• 電気学会


• 映像情報メディア学会


• 電子情報通信学会

• ECO対応設計手法と論理診断に基づく論理再合成手法によるLSI設計変更コスト削減

  沼 昌宏

  学術研究助成基金助成金／基盤研究(C), Apr. 2018 - Mar. 2021

  Competitive research funding


• UNSATコアを活用した高性能論理診断手法とECOコスト削減への応用

  沼 昌宏

  学術研究助成基金助成金／基盤研究(C), Apr. 2015 - Mar. 2018

  Competitive research funding


• CPU・GPU・ASIC同時開発のためのモデルベース画像処理設計ツールの構築

  黒木 修隆

  学術研究助成基金助成金／基盤研究(C), Apr. 2015 - Mar. 2018, Principal investigator

  Competitive research funding


• ＢＤＤとＳＡＴソルバを組み合わせた高多重度論理診断手法とＥＣＯコスト削減への応用

  沼 昌宏

  科学研究費補助金／基盤研究(C), Apr. 2012 - Mar. 2015

  Competitive research funding


• 画像処理ＬＳＩ設計のためのモデルベース自動合成ツールの構築

  黒木 修隆

  科学研究費補助金／基盤研究(C), Apr. 2012 - Mar. 2015, Principal investigator

  Competitive research funding


• ＳＡＴソルバを利用した論理診断手法とＬＳＩ設計変更コスト削減への応用

  沼 昌宏

  科学研究費補助金／基盤研究(C), 2009

  Competitive research funding


• ルームミラー透過式赤外カメラを用いた安全運転支援のための車内撮像システム

  黒木 修隆

  2007, Principal investigator

  Competitive research funding


• 論理設計誤りの自動修正とＬＳＩ設計変更コスト削減への応用

  沼 昌宏

  科学研究費補助金／基盤研究(C), 2006

  Competitive research funding

• コンテンツ選択支援装置

  NUMA MASAHIRO, KUROKI NOBUTAKA, 山本 啓輔, 山村 隼之, 足立 一樹

  特願2002-262774, 09 Sep. 2002, 大学長, 特許4220202, 21 Nov. 2008

  Patent right